Mitsubishi MELSEC-A series, Programming Manual

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5. SEQUENCE INSTRUCTIONS
5
−
26
MELSEC-A
5.3.4 Bit device output reverse (CHK)
The CHK instruction varies in function with I/0 control mode as shown below.
I/O control mode
CPU
Direct mode
Refresh mode
(when either or both of input and output are in refresh mode)
An Failure check

AnN, AnS, AnSH, A1FX,
A0J2H, A73, A3N board
Failure check Bit device output reverse
A3H, A3M Failure check Failure check
A3V, AnA,
A2C, A52G, AnU, A2AS,
QCPU-A (A Mode),
A2USH board

Failure check
For failure check, refer to Section 7.10.2.
Available Device
Bit device Word (16-bit) device Constant Pointer
Level
Ca
rr
y
fla
g
Err
o
r
fla
g
X Y M L S B F T C D W R A0 A1 Z V K H P I N
D
igit specification
Inde
x
M9012 (M9010, M9011)
(D1)
O O O O O O
(D2)
*1: Device used for D2 is a dummy data which has nothing to do with program processing.
AnS
AnN
AnSH
An A1FX
A3H
A3M
A3V AnA
AnU, A2AS
A2USH-S1
A2USH board
QCPU-A
(A Mode)
A0J2H
A2C
A52G
A73
A3N
boad Applicable
CPU
x O x x x x x
Remark
* Valid only when the input/output control method is refresh method.
*1 *1 *1 *1 *1 *1 *1
*1 *1 *1
*1 *1
*1 *1 *1
Output reverse command
CHK (D1) (D2)
(D1) Required device number
(D2)
Dummy data
Any device number
indicated by
K1
to
K4
Setting data
* * * *