Keysight E3631A, Service Manual

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4 Theory of Operation
104 Keysight E3631A Service Guide
source - it cannot be both; transfer between these two modes is accomplished at
a value of load resistance equal to the ratio of the output voltage control setting
to the output current control setting.
Full protection against any overload condition is inherent in the Constant Voltage/
Constant Current design principle since there is not any load condition that can
cause an output which lies outside the operating region. For either constant
voltage or constant current operation, the proper choice of front panel voltage
and current limit settings insures optimum protection for the load device as well
as full protection for the power supply.
The diodes connected across the output terminals in reverse polarity protect the
output electrolytic capacitor and the series pass transistors from the effects of a
reverse voltage applied across the output terminals.
The +6V power mesh and control circuits are similar to those of the ±25V power
circuits except that the the TRIAC preregulator is not used. The ac input, after
passing through power transformer, is rectified and filtered. By feedback action,
the series pass transistor alters its conduction to keep the regulated dc output
voltage constant.
The +6V and the ±25V power mesh and control circuits are isolated from each
other and the two outputs of the ±25V power mesh and control circuit share a
common output terminal.
Earth-Referenced Logic
Microprocessor U10 on the bottom board handles GPIB (IEEE-488) control
through bus interface chip U8 and bus receiver/driver chips U6 and U7 on the
bottom board. The RS-232 interface is also controlled through microprocessor
U10. RS-232 transceiver chip U12 on the bottom board provides the required level
shifting to approximate ±9 volt logic levels through on-chip charge-pump power
supplies using C11 and C12 on the bottom board. Communication between the
earth referenced logic interface circuits and the floating logic is accomplished
through an optically-isolated bi-directional serial interface. Isolator U2 on the
bottom board couples data from U10 to processor U17 on the top board. Isolator
U1 on the bottom board couples data from U17 on the top board to
microprocessor U10 on the bottom board.