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Intel Confidential
9
Introduction
1
Introduction
1.1
Overview
This manual is intended for OEMs and software vendors to clarify various aspects of
programming the SPI flash on PCH family based platforms. The current scope of this
document is for Intel
®
microarchitecture code name Broadwell PCH-LP only.
Chapter 2, “PCH SPI Flash Architecture”
Overview of SPI flash, Non-Descriptor vs. Descriptor, Flash Layout, compatible SPI
flash.
Chapter 3, “PCH SPI Flash Compatibility Requirement”
Overview of compatibility requirements for
Broadwell
PCH
‐
LP
products.
Chapter 4, “Descriptor Overview”
Overview of the descriptor and Descriptor record definition
Chapter 5, “Serial Flash Discoverable Parameter (SFDP) Overview”
Overview of the SFDP definition.
Chapter 6, “Configuring BIOS/GbE for SPI Flash Access”
Describes how to configure BIOS/GbE for SPI flash access.
This tool creates a descriptor and combines the GBE, BIOS, Platform Data Region and
Intel
®
Management Engine Firmware (Intel
®
ME FW) into one image.
Chapter 8, “Flash Programming Tool”
This tool programs the SPI flash device on the Broadwell PCH-LP platforms. This section
will talk about requirements needed for FPT to work.
Chapter 9, “SPI Flash Programming Procedures”
Guide on how to program the SPI flash on the Intel CRB and PCH based platforms.
ME Disable for Debug/Flash Burning Purposes”
Methods of disabling Intel Management Engine for debug purposes.
Chapter 11, “Recommendations for SPI Flash Programming in Manufacturing
Environments”
Recommendations for manufacturing environments.
Chapter 12, “FAQ and Troubleshooting”
Frequently asked questions and Troubleshooting tips.
Summary of Contents for PCH-LP
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