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Intel Confidential
Descriptor Overview
• The Descriptor map has pointers to the lower five descriptor sections as well as the
size of each.
• The Component section has information about the SPI flash part(s) the system. It
includes the number of components, density of each component, read, write and
erase frequencies and invalid instructions.
• The Flash signature at the bottom of the flash (offset 10h) must be 0FF0A55Ah in
order to be in Descriptor mode.
• The Descriptor map has pointers to the lower five descriptor sections as well as the
size of each.
• The Component section has information about the SPI flash part(s) the system. It
includes the number of components, density of each component, read, write and
erase frequencies and invalid instructions.
• The Region section defines the base and the limit of the BIOS, ME and GbE regions
as well as their size.
• The master region contains the hardware security settings for the flash, granting
read/write permissions for each region and identifying each master.
• PCH chipset soft strap sections contain PCH configurable parameters.
• The Reserved region is for future chipset usage.
• The Descriptor Upper Map determines the length and base address of the Intel
®
ME
VSCC Table.
• The Intel
®
ME VSCC Table holds the JEDEC ID and the ME VSCC information for all
the SPI Flash part(s) supported by the NVM image. BIOS and GbE write and erase
capabilities depend on VSCC0 and VSCC1 registers in SPIBAR memory space.
• OEM Section is 256 Byte section reserved at the top of the Flash Descriptor for use
by the OEM.
See
SPI Supported Feature Overview
and
Flash Descriptor Records
in the
Broadwell PCH-LP Family External Design Specification (EDS).
4.1
Flash Descriptor Content
The following sections describe the data structure of the Flash Descriptor on the SPI
device. These are not registers or memory space within PCH. FDBAR - is address 0x0
on the SPI flash device on chip select 0.
4.1.1
Descriptor Signature and Map
4.1.1.1
FLVALSIG - Flash Valid Signature
(Flash Descriptor Records)
Memory Address:FDBAR + 010h
Size: 32 bits
Recommended Value:0FF0A55Ah
Bits
Description
31:0
Flash Valid Signature. This field identifies the Flash Descriptor sector as valid. If the contents at
this location contain 0FF0A55Ah, then the Flash Descriptor is considered valid and it will operate in
Descriptor Mode, else it will operate in Non-Descriptor Mode.
Summary of Contents for PCH-LP
Page 8: ...Intel Confidential 8...
Page 14: ...14 523462 Intel Confidential PCH SPI Flash Architecture...
Page 22: ...22 523462 Intel Confidential PCH SPI Flash Compatibility Requirement...
Page 58: ...58 523462 Intel Confidential Flash Image Tool...
Page 62: ...62 523462 Intel Confidential Flash Programming Tool...
Page 64: ...64 523462 Intel Confidential SPI Flash Programming Procedures...
Page 66: ...66 523462 Intel Confidential Intel ME Disable for Debug Flash Burning Purposes...