Intel PCH-LP, Programming Manual

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PCH SPI Flash Compatibility Requirement
Notes:
1.Typical clock frequency driven by Broadwell PCH-LP Family is 50 MHz.
2.When using 50 MHz mode ensure target flash component can meet t188c and t189c specifications.
Recommended to use SPI flash component rated at 66 MHz or faster.
3.Measurement point for low time and high time is taken at .5(VccME3_3).
Table 3-3. SPI Timings (50 MHz)
Sym Parameter Min Max Units Notes
t180c Serial Clock Frequency - 50 MHz Operation 46.99 53.40 MHz 1
t183c
Tco of SPI_MOSI with respect to serial clock falling
edge at the host
-3 3 ns
t184c
Setup of SPI_MISO with respect to serial clock falling
edge at the host
8 - ns
t185c
Hold of SPI_MISO with respect to serial clock falling
edge at the host
0 - ns
t186c
Setup of SPI_CS[1:0]# assertion with respect to
serial clock rising edge at the host
30 - ns
t187c
Hold of SPI_CS[1:0]# assertion with respect to serial
clock rising edge at the host
30 - ns
t188c SPI_CLK High time 7.84 - ns 2, 3
t189c SPI_CLK Low time 11.84 - ns 2, 3
Figure 3-1. SPI Timing
SPI_CLK
SPI_MOSI
SPI_MISO
SPI_CS#
t186 t187
t184 t185
t183
t189 t188