Intel PCH-LP, Programming Manual

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Descriptor Overview
4.2 OEM Section
Memory Address: F00h Size: 256 Bytes
256 Bytes are reserved at the top of the Flash Descriptor for use by the OEM. The
information stored by the OEM can only be written during the manufacturing process as
the Flash Descriptor read/write permissions must be set to Read Only when the
computer leaves the manufacturing floor. The PCH Flash controller does not read this
information. FFh is suggested to reduce programming time.
4.3 Region Access Control
Regions of the flash can be defined from read or write access by setting a protection
parameter in the Master section of the Descriptor. There are only three masters that
have the ability to access other regions: CPU/BIOS, Intel
®
ME Firmware, and GbE
software/driver running on CPU.
Notes:
1. Descriptor and PDR regions are not masters, so they will not have Master R/W access.
2. Descriptor should NOT have write access by any master in production systems.
3. PDR region should only have read and/or write access by CPU/Host. GbE and ME should NOT have access to
PDR region.
Table 4-1. Region Access Control Table Options
Master Read/Write Access
Region (#) CPU and BIOS ME/MCH GbE Controller
Descriptor (0) Read / Write Read / Write Read / Write
BIOS (1)
CPU and BIOS can always
read from and write to
BIOS region
Read / Write Read / Write
ME (2) Read / Write
ME can always read from
and write to ME region
Read / Write
GbE (3) Read / Write Read / Write
GbE software can always
read from and write to
GbE region
PDR (4) Read / Write Read / Write Read / Write