Intel ITANIUM ARCHITECTURE, Manual

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Volume 4: Base IA-32 Instruction Reference 4:315
POPA/POPAD—Pop All General-Purpose Registers
Description
Pops doublewords (POPAD) or words (POPA) from the procedure stack into the
general-purpose registers. The registers are loaded in the following order: EDI, ESI,
EBP, EBX, EDX, ECX, and EAX (if the current operand-size attribute is 32) and DI, SI,
BP, BX, DX, CX, and AX (if the operand-size attribute is 16). (These instructions reverse
the operation of the PUSHA/PUSHAD instructions.) The value on the stack for the ESP
or SP register is ignored. Instead, the ESP or SP register is incremented after each
register is loaded (see the “Operation” below).
The POPA (pop all) and POPAD (pop all double) mnemonics reference the same opcode.
The POPA instruction is intended for use when the operand-size attribute is 16 and the
POPAD instruction for when the operand-size attribute is 32. Some assemblers may
force the operand size to 16 when POPA is used and to 32 when POPAD is used. Others
may treat these mnemonics as synonyms (POPA/POPAD) and use the current setting of
the operand-size attribute to determine the size of values to be popped from the stack,
regardless of the mnemonic used.
Operation
IF OperandSize = 32 (* instruction = POPAD *)
THEN
EDI

Pop();
ESI

Pop();
EBP

Pop();
increment ESP by 4 (* skip next 4 bytes of stack *)
EBX

Pop();
EDX

Pop();
ECX

Pop();
EAX

Pop();
ELSE (* OperandSize = 16, instruction = POPA *)
DI

Pop();
SI

Pop();
BP

Pop();
increment ESP by 2 (* skip next 2 bytes of stack *)
BX

Pop();
DX

Pop();
CX

Pop();
AX

Pop();
FI;
Flags Affected
None.
Opcode Instruction Description
61 POPA Pop DI, SI, BP, BX, DX, CX, and AX
61 POPAD Pop EDI, ESI, EBP, EBX, EDX, ECX, and EAX