Intel ITANIUM ARCHITECTURE, Manual

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4:130 Volume 4: Base IA-32 Instruction Reference
FILD—Load Integer
Description
Converts the signed-integer source operand into extended-real format and pushes the
value onto the FPU register stack. The source operand can be a word, short, or long
integer value. It is loaded without rounding errors. The sign of the source operand is
preserved.
Operation
TOP

TOP

1;
ST(0)

ExtendedReal(SRC);
FPU Flags Affected
C1 Set to 1 if stack overflow occurred; cleared to 0 otherwise.
C0, C2, C3 Undefined.
Additional Itanium System Environment Exceptions
Itanium Reg Faults Disabled FP Register Fault if PSR.dfl is 1, NaT Register Consumption
Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Floating-point Exceptions
#IS Stack overflow occurred.
Protected Mode Exceptions
#GP(0) If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If the DS, ES, FS, or GS register contains a null segment selector.
#SS(0) If a memory operand effective address is outside the SS segment
limit.
#NM EM or TS in CR0 is set.
#PF(fault-code) If a page fault occurs.
#AC(0) If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
Opcode Instruction Description
DF /0 FILD m16int Push m16int onto the FPU register stack.
DB /0 FILD m32int Push m32int onto the FPU register stack.
DF /5 FILD m64int Push m64int onto the FPU register stack.