Note
that
eac
h
status
group
do es
not
necessarily
con
tain
all
of
the
registers
sho
wn
in
Figure
7-2 .
F
or
example,
the
Standard
Ev
en
t
status
group
only
con
tains
an
Ev
en
t
Register
and
an
Enable
Register.
Eac
h
of
the
Signal
Generator
status
groups
consists
of
some
or
all
of
the
registers
explained
b elow:
Condition
Register
A
condition
register
con
tinuously
monitors
the
hardw
are
and
rm
w
are
status
of
the
Signal
Generator.
There
is
no
latching
or
buering
for
a
condition
register;
it
is
up dated
in
real
time.
Negativ
e
Transition
Register
A
negative
transition
register
sp ecies
the
bits
in
the
condition
register
that
will
set
corresp onding
bits
in
the
ev
en
t
register
when
the
condition
bit
c
hanges
from
1
to
0.
P
ositiv
e
Transition
Register
A
p ositiv e
transition
register
sp ecies
the
bits
in
the
condition
register
that
will
set
corresp onding
bits
in
the
ev
en
t
register
when
the
condition
bit
c
hanges
from
0
to
1.
Ev
ent
Register
An
ev
en
t
register
latches
transition
ev
en
ts
from
the
condition
register
as
sp ecied
b
y
the
p ositiv e
and
negative
transition
registers.
Bits
in
the
ev
en
t
register
are
latched,
and
once
set,
they
remain
set
un
til
cleared
b
y
either
querying
the
register
con
ten
ts
or
sending
the
\*CLS"
command.
Enable
Register
An
enable
register
sp ecies
the
bits
in
the
ev
en
t
register
that
can
generate
a
summary
bit.
The
Signal
Generator
logically
ANDs
corresp onding
bits
in
the
ev
en
t
and
enable
registers,
and
ORs
all
the
resulting
bits
to
pro duce
a
summary
bit.
Summary
bits
are,
in
turn,
used
b
y
the
Status
Byte
group.
Signal
Generator
Status
Groups
The
Signal
Generator
status
register
system
consists
of
the
Status
Byte
group
and
three
other
status
groups
that
pro
vide
input
to
the
Status
Byte
group.
The
following
paragraphs
explain
the
information
that
is
pro
vided
b
y
eac
h
status
group.
The
Status
Byte
Group
The
Status
Byte
group
is
used
to
determine
the
general
nature
of
an
instrumen
t
ev
en
t
or
condition.
The
Status
Byte
group
consists
of
the
Service
Request
Enable
register
and
the
Status
Byte.
The
bits
in
the
Status
Byte
pro
vide
y
ou
with
the
following
information:
Bit
Description
0
-
2
These
bits
are
alwa
ys
set
to
0.
3
A
1
in
this
bit
p osition
indicates
that
the
Questionable
Data
summary
bit
has
b een
set.
The
Questionable
Ev
en
t
register
can
then
b e
read
to
determine
the
sp ecic
condition
that
caused
this
bit
to
b e
set.
Programming
Commands
7-119
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