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Rev. 1.00
369 of 486
July 31, 2018
32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
16 Motor Control T
imer (MCTM)
Channel 2 Capture/Compare Register – CH2CCR
This register specifies the timer channel 2 capture/compare value.
Offset:
0x098
Reset value: 0x0000_0000
31
30
29
28
27
26
25
24
Reserved
Type/Reset
23
22
21
20
19
18
17
16
Reserved
Type/Reset
15
14
13
12
11
10
9
8
CH2CCV
Type/Reset RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0
7
6
5
4
3
2
1
0
CH2CCV
Type/Reset RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0
Bits
Field
Descriptions
[15:0]
CH2CCV
Channel 2 Capture/Compare Value
- When Channel 2 is configured as an output
The CH2CCR value is compared with the counter value and the comparison result
is used to trigger the CH2OREF output signal.
- When Channel 2 is configured as an input
The CH2CCR register stores the counter value captured by the last channel 2
capture event.