75
The above function codes are generally used to correct the zero offset of the analog output and the deviation of
the output amplitude. It can also be used to customize the required AO output curve.
If the zero offset is represented by “b", the gain is represented by k, the actual output is represented by y, and
the standard output is represented by x, the actual output is: Y = kX + b * 10V.
Among them, the zero offset coefficient of AO1 and AO2 is 100 % corresponding to 10v (or 20mA), and the
standard output refers to the output of 0V - 10V (or 0mA - 20mA) corresponding to the amount indicated by the
analog output without zero offset and gain correction.
For example, if the analog output content is operating frequency, it is expected to output 8v at frequency 0 and
3v at maximum frequency, then the gain should be set to " - 0.50" and the zero offset should be set to " 80 %".
F4-17 FMR output delay time
0.0s
～
3600.0s [0.0S]
F4-18 relay1 output delay time
0.0s
～
3600.0s [0.0S]
F4-20 DO1 output delay time
0.0s
～
3600.0s [0.0S]
Set the output terminals FMR, relays 1, DO1 to delay the change from the state to the actual output.
F4 - 22 selection of valid state of output terminal
00000
～
11111 [00000]
BIT0:FMR positive and negative logic
definition
BIT1: relay 1 positive and negative logic
definition
BIT3: DO1 positive and negative logic
definition
Figure 5 - 08
Defines the output logic of the output terminals FMR, relay 1, DO1. 0: positive logic, the digital quantity output
terminal and the corresponding common terminal are connected in a valid state and disconnected in an invalid state;
1: reverse logic, the connection between the digital quantity output terminal and the corresponding common
terminal is invalid, and the disconnection is valid.
F4-24 frequency detection value ( FD t1 )
0.00 Hz ~ maximum frequency [ 50.00 Hz ]
F4-25 frequency detection lag value ( FD t1 )
0.0 % ~ 100.0 % ( FD t1 level ) [ 5.0 % ]
F4-26 frequency detection value ( FD T2 )
0.00 Hz ~ maximum frequency [ 50.00 hz ]
F4-27 frequency detection lag value ( FD T2 )
0.0 % ~ 100.0 % ( FDT2 level ) [ 5.0 % ]
When the operating frequency is higher than the frequency detection value, the multi-function output ( No. 03
FDT1, No. 25 FDT2 ) DO of the frequency inverter outputs on signal, while when the frequency is lower than the
detection value by a certain frequency value, the DO output on signal is cancelled.
The above parameters are used to set the detection value of the output frequency and the hysteresis value of
the release of the output action. Wherein F4 - 25 / F4 - 27 is the percentage of lag frequency relative to the frequency
detection value F4 - 24 / F4 - 26. Figs. 5 - 09 show the intent of the FDT function.
