9-30
L60 LINE PHASE COMPARISON SYSTEM – INSTRUCTION MANUAL
OVERVIEW
CHAPTER 9: THEORY OF OPERATION
9
From this perspective, to boost the magnitude on heavily saturated CTs, the RMS component is calculated as follows (on a
sample-by-sample basis):
Eq. 9-5
where N
1
represents the number of samples per cycle (64).
The magnitude estimator combines the fast estimator for accuracy, the RMS value for dependability on CT saturation or
other severe transients, and the waveform peak for speed:
Eq. 9-6
The local operating current is converted into phase pulses. It is important to realize that the operation is nonlinear, erasing
almost all information contained in the magnitude of the signal and presenting exclusively the phase information by
encoding the on/off pulses signifying polarity of the operating signal. This polarity is preserved with respect to the universal
analog time. This is one of the key advantages of the phase comparison principle, even when implemented digitally: no
synchronization is required between the individual relays of the 87PC scheme.
The raw LOC-al pulses (Positive and Negative polarity) are produced disregarding the FDL and FDH flags. The fault detector
flags are used in the dual-breaker, key, and trip logic. The raw pulses are calculated as follows.
For tripping schemes:
Eq. 9-7
The logical signal that marks the positive polarity (P) is asserted as long as the mixed current is greater than 0.005 pu of the
CT nominal. The logical signal that marks the negative polarity (N) is asserted as long as the mixed current is less than
–0.005 pu of the CT nominal.
To ensure security and dependability for blocking schemes, especially during low current conditions when pulses might be
shortened, square pulses are created as follows:
Eq. 9-8
