CHAPTER 9: THEORY OF OPERATION
OVERVIEW
L60 LINE PHASE COMPARISON SYSTEM – INSTRUCTION MANUAL
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9
Figure 9-22: Formation for square pulses for tripping and blocking schemes
The operation for blocking schemes insures reliable blocking pulses in cases where the operating current is close to the
squaring pickup constant (0.005 pu). If the operating signal triggered a positive square pulse once it crossed the positive
threshold, then it stays within the deadband (between
and
) and the blocking pulse
is reset in one cycle.
The phase comparison principle faces security problems when fed from externally summed currents in two-breaker
applications. To maintain the excellent immunity to CT saturation of the ‘original, single-breaker’ phase-comparison
principle, the two currents must be processed individually and both the phase and magnitude information used to detect
the through fault condition.
The dual breaker logic consolidates two pieces of information: fault detector flags signaling the rough current levels and
the phase pulses signaling current direction.
The fault detector flags are ORed between the two breakers (breakers 1 and 2) as follows:
•
FDL = FDL1 OR FDL2
Where FDL1 and FDL2 are ORed mixed current signals and the advanced fault detectors are as per the 87PC logic, and
•
FDH = FDH1 OR FDH2
where FDH1 and FDH2 are ORed mixed current signals and the advanced fault detectors are as per the 87PC logic.
The rationale behind this logic is that regardless which breaker (or both) carries a current, the elevated current condition
(FDL) is declared to signal permission or blocking as per the scheme type and fault location. The trip supervision condition
(FDH) is processed in a similar manner.
The ‘pulse’ combination logic ensures security and dependability. In this respect, a distinction must be made between
tripping and blocking schemes. The following figure illustrates the dual breaker logic for permissive (section a) and blocking
(section b) transmit schemes.