Freescale Semiconductor HCS08 Series, Reference Manual

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Chapter 4 Memory
MC9S08JS16 MCU Series Reference Manual, Rev. 4
50 Freescale Semiconductor
4.6 Flash Memory
The flash memory is primarily for program storage. In-circuit programming allows the operating program
to be loaded into the flash memory after final assembly of the application product. It is possible to program
the entire array through the single-wire background debug interface. Because no special voltages are
needed for flash erase and programming operations, in-application programming is also possible through
other software-controlled communication paths. For a more detailed discussion of in-circuit and
in-application programming, refer to the
HCS08 Family Reference Manual, Volume I, Freescale
Semiconductor document order number HCS08RMv1.
4.6.1 Features
Features of the flash memory include:
• Flash size
— MC9S08JS16 — 16, 384 bytes (32 pages of 512 bytes each)
— MC9S08JS8 — 8,192 bytes (16 pages of 512 bytes each)
• Single power supply program and erase
• Command interface for fast program and erase operation
• Up to 100,000 program/erase cycles at typical voltage and temperature
• Flexible block protection
• Security feature for flash and RAM
• Auto power-down for low-frequency read accesses
4.6.2 Program and Erase Time
Before any program or erase command can be accepted, the flash clock divider register (FCDIV) must be
written to set the internal clock for the flash module to a frequency (f
FCLK
) between 150 kHz and 200 kHz
(see Section 4.8.1, “Flash Clock Divider Register (FCDIV) ”). This register can be written only once, so
normally this write is done during reset initialization. FCDIV cannot be written if the access error flag,
FACCERR in FSTAT, is set. The user must ensure that FACCERR is not set before writing to the FCDIV
register. One period of the resulting clock (1/f
FCLK
) is used by the command processor to time program
and erase pulses. An integer number of these timing pulses is used by the command processor to complete
a program or erase command.
Table 4-6 shows program and erase time. The bus clock frequency and FCDIV determine the frequency of
FCLK (f
FCLK
). The time for one cycle of FCLK is t
FCLK
= 1/f
FCLK
. The times are shown as a number of
cycles of FCLK and as an absolute time for the case where t
FCLK
= 5
μ
s. Program and erase time shown
include overhead for the command state machine and enabling and disabling of program and erase
voltages.