Timer/Pulse-Width Modulator (S08TPMV3)
MC9S08JS16 MCU Series Reference Manual, Rev. 4
226
Freescale Semiconductor
When the TPM is configured for center-aligned PWM (and ELSnB:ELSnA not = 0:0), the data direction
for all channels in this TPM are overridden, the TPMCHn pins are forced to be outputs controlled by the
TPM, and the ELSnA bits control the polarity of each TPMCHn output. If ELSnB:ELSnA=1:0, the
corresponding TPMCHn pin is cleared when the timer counter is counting up, and the channel value
register matches the timer counter; the TPMCHn pin is set when the timer counter is counting down, and
the channel value register matches the timer counter. If ELSnA=1, the corresponding TPMCHn pin is set
when the timer counter is counting up and the channel value register matches the timer counter; the
TPMCHn pin is cleared when the timer counter is counting down and the channel value register matches
the timer counter.
Figure 14-5. High-True Pulse of a Center-Aligned PWM
Figure 14-6. Low-True Pulse of a Center-Aligned PWM
CHnF BIT
TOF BIT
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TPMMODH:TPMMODL = 0x0008
TPMMODH:TPMMODL = 0x0005
TPMCNTH:TPMCNTL
TPMCHn
CHnF BIT
TOF BIT
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TPMMODH:TPMMODL = 0x0008
TPMMODH:TPMMODL = 0x0005
TPMCNTH:TPMCNTL
TPMCHn
Summary of Contents for HCS08 Series
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