Freescale Semiconductor HCS08 Series, Reference Manual

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16-Bit Serial Peripheral Interface (S08SPI16V1)
MC9S08JS16 MCU Series Reference Manual, Rev. 4
Freescale Semiconductor 197
13.3.4 SPI Status Register (SPIS)
This register has four read-only status bits. Bits 3 through 0 are not implemented and always read 0. Writes
have no meaning or effect.
Table 13-7. SPI Baud Rate Divisor
SPR2:SPR1:SPR0 Rate Divisor
0:0:0 2
0:0:1 4
0:1:0 8
0:1:1 16
1:0:0 32
1:0:1 64
1:1:0 128
1:1:1 256
7 6 5 4 3 2 1 0
R SPRF SPMF SPTEF MODF 0 0 0 0
W
Reset 0 0 1 0 0 0 0 0
= Unimplemented or Reserved
Figure 13-8. SPI Status Register (SPIS)
Table 13-8. SPIS Register Field Descriptions
Field Description
7
SPRF
SPI Read Buffer Full Flag — SPRF is set at the completion of an SPI transfer to indicate that received data may
be read from the SPI data register (SPIDH:SPIDL). SPRF is cleared by reading SPRF while it is set, then reading
the SPI data register.
0 No data available in the receive data buffer.
1 Data available in the receive data buffer.
6
SPMF
SPI Match Flag — SPMF is set after SPRF = 1 when the value in the receive data buffer matches the value in
SPIMH:SPIML. To clear the flag, read SPMF when it is set, then write a 1 to it.
0 Value in the receive data buffer does not match the value in SPIMH:SPIML registers.
1 Value in the receive data buffer matches the value in SPIMH:SPIML registers.