Freescale Semiconductor HCS08 Series, Reference Manual

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MC9S08JS16 MCU Series Reference Manual, Rev. 4
Freescale Semiconductor 189
Figure 13-2. SPI Module Quick Start
MSTR CPOL CPHA SSOE LSBFE
MODFEN BIDIROE
SPIMODE
SPISWAI SPC0 SPMIE
Additional configuration options.
SPPR0 SPR2 SPR1 SPR0 SPPR2 SPPR1
Baud rate = (BUSCLK/SPPR[2:0])/SPR2[2:0]
Bit 15
Bit 7
Module Initialization (Slave):
Write: SPIC1 to configure interrupts, set primary SPI options, slave mode select, and
system enable.
Write: SPIC2 to configure optional SPI features, hardware match interrupt enable,
and 8- or 16-bit data transmission length
Write: SPIMH:SPIML to set hardware compare value that triggers SPMF (optional)
when value in receive data buffer equals this value.
Module Initialization
(Master):
Write: SPIC1 to configure interrupts, set primary SPI options, master mode select,
and system enable.
Write: SPIC2 to configure optional SPI features, hardware match interrupt enable,
and 8- or 16-bit data transmission length
Write: SPIBR to set baud rate
Write: SPIMH:SPIML to set hardware compare value that triggers SPMF (optional)
when value in receive data buffer equals this value.
Module Use:
After SPI master initiates transfer by checking that SPTEF = 1 and then writing data to SPIDH/L:
Wait for SPRF, then read from SPIDH/L
Wait for SPTEF, then write to SPIDH/L
Data transmissions can be 8- or 16-bits long, and mode fault detection can be enabled for master mode in cases where
more than one SPI device might become a master at the same time. Also, some applications may utilize the receive data
buffer hardware match feature to trigger specific actions, such as when command data can be sent through the SPI or to
indicate the end of an SPI transmission.
SPIC1
SPIC2
SPIBR
SPIDH
SPIDL
SPIE SPE SPTIE
Module/interrupt enables and configuration
Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Bit 6 Bit 5
Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
SPIMH
Hardware Match Value
Bit 15
Bit 7
Bit 14
Bit 13 Bit 12 Bit 11
Bit 10 Bit 9 Bit 8
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MODF SPTEF
SPIS
SPRF SPMF
SPIML