Freescale Semiconductor HCS08 Series, Reference Manual

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Chapter 4 Memory
MC9S08JS16 MCU Series Reference Manual, Rev. 4
42 Freescale Semiconductor
Nonvolatile flash registers, as shown in Table 4-4 , are located in the flash memory. These registers include
an 8-byte backdoor key that optionally can be used to gain access to secure memory resources. During
reset events, the contents of NVPROT and NVOPT in the nonvolatile register area of the flash memory
are transferred into corresponding FPROT and FOPT working registers in the high-page registers to
control security and block protection options.
The factory MCG trim value is stored in the flash information row (IFR
1
) and will be loaded into the
MCGTRM and MCGSC registers after any reset. The internal reference trim values stored in flash, TRIM
and FTRIM, can be programmed by third party programmers and must be copied into the corresponding
MCG registers by user code to override the factory trim.
NOTE
When the MCU is in active BDM, the trim value in the IFR will not be
loaded, the MCGTRM register will reset to 0x80 and the FTRIM bit in the
MCGSC register will be reset to 0.
0x1819–
0x181F Reserved —
— —
— —
— —
— —
— —
— —
— —
—
0x1820 FCDIV DIVLD PRDIV8 DIV5 DIV4 DIV3 DIV2 DIV1 DIV0
0x1821 FOPT KEYEN FNORED 0 0 0 0 SEC01 SEC00
0x1822 Reserved — — — — — — — —
0x1823 FCNFG 0 0 KEYACC 0 0 0 0 0
0x1824 FPROT FPS7 FPS6 FPS5 FPS4 FPS3 FPS2 FPS1 FPDIS
0x1825 FSTAT FCBEF FCCF FPVIOL FACCERR 0 FBLANK 0 0
0x1826 FCMD FCMD7 FCMD6 FCMD5 FCMD4 FCMD3 FCMD2 FCMD1 FCMD0
0x1827–
0x183F Reserved —
— —
— —
— —
— —
— —
— —
— —
—
0x1840 PTAPE PTAPE7 PTAPE6 PTAPE5 PTAPE4 PTAPE3 PTAPE2 PTAPE1 PTAPE0
0x1841 PTASE PTASE7 PTASE6 PTASE5 PTASE4 PTASE3 PTASE2 PTASE1 PTASE0
0x1842 PTADS PTADS7 PTADS6 PTADS5 PTADS4 PTADS3 PTADS2 PTADS1 PTADS0
0x1843 Reserved — — — — — — — —
0x1844 PTBPE 0 0 PTBPE5 PTBPE4 R R PTBPE1 PTBPE0
0x1845 PTBSE 0 0 PTBSE5 PTBSE4 PTBSE3 PTBSE2 PTBSE1 0
0x1846 PTBDS 0 0 PTBDS5 PTBDS4 PTBDS3 PTBDS2 PTBDS1 0
0x1847–
0x185F Reserved —
— —
— —
— —
— —
— —
— —
— —
—
1. IFR — Nonvolatile information memory that can be only accessed during production test. During production test, system
initialization, configuration and test information is stored in the IFR. This information cannot be read or modified in normal user
or background debug modes.
Table 4-3. High-Page Register Summary (Sheet 2 of 2)
Address Register Name Bit 7 6 5 4 3 2 1 Bit 0