Freescale Semiconductor HCS08 Series, Reference Manual

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Universal Serial Bus Device Controller (S08USBV1)
MC9S08JS16 MCU Series Reference Manual, Rev. 4
Freescale Semiconductor 267
15.4.3 USB Transactions
When the USB module transmits or receives data, it will first compute the BDT address based on the
endpoint number, data direction, and which buffer is being used (even or odd), then it will read the BD.
Once the BD has been read, and if the OWN bit equals 1, the serial interface engine (SIE) will transfer the
packet data to or receive the packet data from the buffer pointed to by the EPADR field of the BD. When
the USB TOKEN is complete, the USB module will update the BDT and change the OWN bit to 0.
The STAT register is updated and the TOKDNE interrupt is set. When the microcontroller processes the
TOKDNE interrupt, it reads the status register. This gives the microcontroller all the information it needs
to process the endpoint. At this point the microcontroller can allocate a new BD, so additional USB data
can be transmitted or received for that endpoint, and it can process the previous BD.
Figure 15-20 shows
a timeline for how a typical USB token would be processed.
BDTSTALL
BDT Stall — Setting this bit will cause the USB module to issue a STALL handshake if a token is received by
the SIE that would use the BDT in this location. The BDT is not consumed by the SIE (the OWN bit remains
and the rest of the BD is unchanged) when the BDTSTALL bit is set.
0 BDT stall is disabled
1 USB will issue a STALL handshake if a token is received by the SIE that would use the BDT in this location
BC[7:0]
Byte Count — The Byte Count bits represent the 8-bit byte count. The USB module serial interface engine
(SIE) will change this field upon the completion of a RX transfer with the byte count of the data received. Note
that while USB supports packets as large as 1023 bytes for isochronous endpoints, this module limits packet
size to 64 bytes.
EPADR[9:4]
Endpoint Address — The endpoint address bits represent the upper 6 bits of the 10-bit buffer address within
the module’s local USB RAM. Bits [3:0] of EPADR are always zero, therefore the address of the buffer must
always start on a 16-byte aligned address within the local RAM. These bits are unchanged by the USB module.
This is NOT the address of the memory on the system bus. EPADR is relative to the start of the local USB RAM.
Table 15-20. Buffer Descriptor Table Fields (continued)
Field Description