Freescale Semiconductor HCS08 Series, Reference Manual

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Universal Serial Bus Device Controller (S08USBV1)
MC9S08JS16 MCU Series Reference Manual, Rev. 4
258 Freescale Semiconductor
15.3.13 Endpoint Control Register (EPCTLn, n=0-6)
The endpoint control registers contains the endpoint control bits (EPCTLDIS, EPRXEN, EPTXEN, and
EPHSHK) for each endpoint available within the USB module for a decoded address. These four bits
define all of the control necessary for any one endpoint. The formats for these registers are shown in the
tables below. Endpoint 0 (ENDP0) is associated with control pipe 0 which is required by the USB for all
functions. Therefore, after a USBRST interrupt has been received, the microcontroller must set EPCTL0
to contain 0x0D.
7 6 5 4 3 2 1 0
R 0 0 0 0 0 FRM10 FRM9 FRM8
W
Reset 0 0 0 0 0 0 0 0
= Unimplemented or Reserved
Figure 15-16. Frame Number Register High (FRMNUMH)
Table 15-16. FRMNUMH Field Descriptions
Field Description
2–0
FRM[10:8]
Frame Number — These bits represent the high order bits of the 11-bit frame number.
7 6 5 4 3 2 1 0
R 0 0
0 EPCTLDIS EPRXEN EPTXEN EPSTALL EPHSHK
W
Reset
(EP0-6)
0 0 0 0 0 0 0 0
= Unimplemented or Reserved
Figure 15-17. Endpoint Control Register (EPCTLn)
Table 15-17. EPCTLn Field Descriptions
Field Description
4
EPCTLDIS
Endpoint Control — This bit defines if an endpoint is enabled and the direction of the endpoint. The
endpoint enable/direction control is defined in Table 15-18 .
3
EPRXEN
Endpoint Rx Enable — This bit defines if an endpoint is enabled for OUT transfers. The endpoint
enable/direction control is defined in Table 15-18 .
2
EPTXEN
Endpoint Tx Enable — This bit defines if an endpoint is enabled for IN transfers. The endpoint
enable/direction control is defined in Table 15-18 .