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8-bit Parallel
Circuit
Figure 2-43 shows the 8-bit parallel interface circuit.
This circuit is controlled by the main CPU.
Address mapping for the
10P ( 11 B) is performed by the main CPU via the
(14A). General
purpose 8-bit parallel interface
10P ( 11 B) is employed to simplify the control required from
the main CPU.
The latch circuit ( 14C) converts the control data in the main CPU into an 8-bit parallel interface signal
(PE, ERROR, and BUSY) according to the select signal
from the
The
and AUTO FEED XT signals are fixed signals from the host computer, read into the sub
CPU as default values, and transferred to the main CPU.
●
Refer to Appendix
.10 for the details of the
10P.
EXTERNAL
M54610P(1 1
,
INIT
ACKNLG
STROBE
ERROR
PE
R87
I
RDY
CONTROL
READY LED pANEL
—
.
BSYF
B
U S Y
BSSL
—
T
R
R
ACKI
1
I
1
I
I I
I
I
I
MAIN CPU
.
I
I
I I
I
I
l
l
II JAI
DIN
l a l a
\
6
\ \
R126
/
C51
—
IQ
Psw
2D
BO 1
30 3D
0
’
—
40 4D
CLK
I
DO- D
PORTO
7
(1 4A)
Figure 2-43. 8-Bit
Interface Circuit
Figures 2-44 and 2-45 show the processing sequence for these signals and the interface signal timing.
Table 2-33 shows the control signals used between the printer and host computer.
2-49
Summary of Contents for LQ-2550
Page 1: ...L Q 2 5 5 0 TECHNICAL MANUAL EPSON ...
Page 240: ...REV A P r cl Figure 6 3 LQ 2550 Lubrication and Adhesive Application Points Diagram 2 6 3 ...
Page 241: ...REV A 7 i_ Figure 6 4 LQ 2550 Lubrication and Adhesive Application Points Diagram 3 6 4 ...
Page 252: ...REV A I 1 I 7 v m o m x b Figure A 6 PPD781OHG Block Diagram A 7 ...
Page 297: ...REV A 1 L I Irl N I i t 1 I I x Figure A 50 ROPSE Board Circuit Diagram A 52 ...