TABLE OF CONTENTS
Copyright 2007
iii
S SC150e HARDWARE REFERENCE
APPENDICES
APPENDIX A - SPECIFICATIONS ........................................................................................................... A-1
APPENDIX B - CSR DESCRIPTION.......................................................................................................... B-1
APPENDIX C - CSR SUMMARY ............................................................................................................... C-1
APPENDIX D - CONFIGURATION AIDS ................................................................................................. D-1
GLOSSARY................................................................................................................................ GLOSSARY-1
INDEX .................................................................................................................................................INDEX-1
FIGURES
Figure 2-1 Functional Diagram ...................................................................................................................... 2-2
Figure 2-2 ACR/Memory Access................................................................................................................... 2-5
Figure 2-3 Outgoing Interrupt ........................................................................................................................ 2-7
Figure 2-4 Incoming Interrupt........................................................................................................................ 2-8
Figure 3-1 S SC150e PCI Card................................................................................................... 3-1
Figure 3-2 S SC150e PMC Card................................................................................................. 3-2
Figure 3-3 S SC150e CPCI Card ................................................................................................ 3-3
Figure 3-4 Ring with Bypass Switches........................................................................................................... 3-6
Figure 3-5 Node Inclusion and Isolation ........................................................................................................ 3-6
Figure 4-1 PCI Layout (card revision B1)...................................................................................................... 4-2
Figure 4-2 PCI Layout (card revision C1 or higher) ...................................................................................... 4-3
Figure 4-3 PMC Layout ................................................................................................................................. 4-4
Figure 4-4 CPCI Layout................................................................................................................................. 4-5
Figure 4-5 EEPROM WRITE (J303) ............................................................................................................. 4-6
Figure 4-6 EEPROM READ (J304)............................................................................................................... 4-6
Figure 4-7 PMC Card Installation .................................................................................................................. 4-7
Figure 4-8 Fiber-optic ST Connector ............................................................................................................. 4-9
Figure 4-9 Fiber-Optic Connections............................................................................................................. 4-10
Figure 4-10 Inserted State (Power On)......................................................................................................... 4-11
Figure 4-11 Bypass State (Power Off) ......................................................................................................... 4-11
Figure 4-12 Inserted State (Power On)......................................................................................................... 4-12
Figure 4-13 Bypass State (Power Off) ......................................................................................................... 4-13
Figure 4-14 Auxiliary Connection................................................................................................................ 4-14
Figure 4-15 PMC Faceplate With Auxiliary Connection ............................................................................. 4-14
Figure 5-1 Memory Sharing With Virtual Paging.......................................................................................... 5-2
Figure 5-2 Transmit Interrupt Logic............................................................................................................. 5-12
Figure 5-3 Receive Interrupt Logic .............................................................................................................. 5-14
Figure 5-4 Data Filter Logic......................................................................................................................... 5-20
Figure 5-5 Monitor and Bypass Mode.......................................................................................................... 5-22
Figure 5-6 Wire Loopback Mode................................................................................................................. 5-23
Figure 5-7 Mechanical Switch Loopback Mode .......................................................................................... 5-24
Figure 5-8 Fiber-optic Loopback Mode ....................................................................................................... 5-25
Figure 5-9 Insert Mode................................................................................................................................. 5-27
Figure 5-10 Quad Switch ............................................................................................................................. 5-29
Figure 5-11 Interrupt Service Routine............................................................................................................ 1-1
Summary of Contents for SCRAMNet+ SC150e
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