CSR DESCRIPTIONS
Copyright 2007
B-6
S SC150e HARDWARE REFERENCE
Table B-3 CSR2 - Node Control (Read/Write)
Bits Description
5-0
These bits are related to lines connected through the MUX control port and are available to the
host interface. They are not required to connect to anything
6
Disable Fiber Optic Loopback
- When this bit is ‘0’ (power up default), the output of the
transmitter is connected by fiber optics directly to the input of the receiver, and the receiver is
disconnected from the network. The optional Fiber Optic Bypass Switch must be installed for
this mode to be effective. This mode is valid only when the Insert Node CSR0[15] is ON. Set
this bit to disable the loopback mode when the node is in use as a part of the network.
7
Enable Wire Loopback
- When this bit is set, the output of the transmitter is connected by wire
directly to the input of the receiver, and the receiver is disconnected from the network. The
purpose of this bit is purely diagnostic. This mode is valid only when the Insert Node CSR0[15]
is OFF.
8
Disable Host to Memory Write
- When this bit is set, the host writes are not written to the host
node’s shared memory, but are sent out on the network if Transmit CSR0[1] is ON.
9
Write Own Slot Enable
- When this bit is set, the message slot (packet) sent out to the
network can be received by the originating node. This is not the normal procedure but may be
used (in conjunction with CSR2[10] when it is desired to generate an interrupt to the host,
written by the host.
10
Enable Interrupt On Own Slot
- When this bit is set, a message with the interrupt bit set can
be received by the originating node if CSR2[9], is also set. This coupling enables a host
processor to interrupt itself (Self Interrupt).
11
Message Length Limit
- Variable maximum message size: 1024 bytes or 256 byte. It is used
in conjunction with CSR2[12], CSR2[14] and CSR2[15] to enable PLUS mode communication
protocols.
12
Variable Length Messages on Network
- When ON, this bit enables variable length
messages. It is used in conjunction with CSR2[11], CSR2[14] and CSR2[15] to enable PLUS
mode communication protocols (see below).
13
HIPRO Enable
- When this bit is set, the two 16-bit shortwords associated with the longword
addressed at ACR[4], will be transmitted onto the network as one 32-bit longword. The first
shortword write will be held until the second shortword write occurs, which results in the 32-bit
data value to be written to the network.
Exceptions:
HIPRO will not work when Disable Host to Memory Write CSR2[8] is set.
HIPRO will not work when writing two separate shortwords while using interrupts.
14
Multiple Messages
- This bit allows multiple native messages on the network. It is used in
conjunction with CSR2[11], CSR2[12] and CSR2[15] to enable the BURST mode
communication protocol (see below).
Write-Me-Last/Self-Interrupt Mode Definition
CSR2[10] CSR2[9] CSR2[8]
Mode
0
1
1
WRITE ME LAST mode
1 1 0
SELF-INTERRUPT
mode
1
1
1
WRITE ME LAST with SELF-INTERRUPT mode
Summary of Contents for SCRAMNet+ SC150e
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