INSTALLATION
Copyright 2007
4-15
S SC150e HARDWARE REFERENCE
Table 4-2 PMC Auxiliary Connection Pinout
Pins Name
Definition
1 GND
Logic
Ground
2
F_RELAY
Fiber Optic Relay Drive and Sense
3 EXT_PWR
Backup
+
5 Source to External Device
4.8 Internal Configuration
4.8.1 S SC150e Control/Status Registers (CSR)
Table 4-3 is a listing of the S SC150e Control/Status Registers.
If using software other than that supplied by Curtiss-Wright Controls the offsets in the
first two columns must be added to the 0x800000 CSR base address.
The Curtiss-Wright Controls software automatically calculates the offsets.
Table 4-3 S SC150e Control/Status Registers
Shortword
Offset
(Hex)
Byte
Offset
(Hex)
Alias
Size
(Bytes)
Active
Bits
Type
Register
Description
1
2
CSR0
2
16
R/W
General S SC150e Enable and
Reset
80
100
CSR1
2
16
R/W
S SC150e Error Indicators
103
206
CSR2
2
16
R/W
General S SC150e Control
182
304
CSR3
1
1
8
8
R/W
R/W
Number of nodes
Node ID
205
40A
CSR4
2
16
R
Interrupt FIFO Address (LSW)
284
508
CSR5
2
9
7
R*
-
Interrupt FIFO Address (MSW)
Reserved
*Write Transmit Time-out to shadow
memory
307
60E
CSR6
2
0
-
Reserved
386
70C
CSR7
2
0
-
Reserved
409
812
CSR8
2
16
R/W
Extended Control Register
488
910
CSR9
2
16
R/W
Interrupt On Error Mask
50B
A16
CSR10
2
4
12
R/W
-
Shared Memory Address (LSW)
Reserved
58A
B14
CSR11
2
16
R/W
Shared Memory Address (MSW)
60D
C1A
CSR12
2
16
R/W
Virtual Paging Register
68C
D18
CSR13
2
16
R/W
General-purpose Counter/Timer
70F
E1E
CSR14
2
0
-
Reserved
78E
F1C
CSR15
2
0
-
Reserved
ACR
1
5
3
R/W
-
Auxiliary Control, RAM
Reserved
Summary of Contents for SCRAMNet+ SC150e
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