Curtiss-Wright SCRAMNet+ SC150e, Hardware Reference Manual

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GLOSSARY
Copyright 2007 Glossary 2 S SC150e HARDWARE REFERENCE
carrier loss
------------------------A hardware failure reported when the incoming light link has failed
because it is too weak or nonexistent in one or both fibers from the
preceding node.
CSR
---------------------------------Control/status register. These registers are used for configuration and
control and provide status values that can be interrogated. These registers
are located in the computer’s address space. Power-up register values are
contained in the EEPROM.
data filter
--------------------------A process of comparing a host write to shared memory with contents of
the specified memory location to eliminate transmission of redundant
data and reduce network traffic.
data transfer bus
-----------------One of the four buses provided by the backplane. The data transfer bus
allows masters to direct the transfer of binary data between themselves
and slaves (data transfer bus is often abbreviated DTB).
data-transfer-bus cycle
---------A sequence of level transitions on the signal lines of the DTB that result
in the transfer of an address or an address and data between a master and
a slave. There are 34 types of data transfer bus cycles.
deterministic
----------------------Completely predictable message transit time from application to
application.
device interrupt
------------------An interrupt received on interrupt priority levels 20-23. Only devices,
controllers, and memories can request device interrupts.
direct memory access
-----------(DMA) transfer. An I/O transfer conducted by a device controller which
accesses memory directly and, as a result, can transfer a large volume of
data without requesting a processor interrupt after each unit amount.
Contrast with programmed I/O (PIO) transfer.
DTB
---------------------------------A mnemonic for data transfer bus.
edges
--------------------------------Transitions that appear on a signal line.
EEPROM
--------------------------The EEPROM stores the initial power-up register values. The EEPROM
can be programmed either over the backplane or by most PROM
programmers. An EEPROM Initialization (EPI) Program is included in
the SYSTRAN software utilities.
falling edge
------------------------The time during which a signal makes its transition from high to low.
FIFO
--------------------------------A data storage method; First In First Out. Also refers to the specific
storage area; Transmit FIFO, Interrupt FIFO, etc.
foreign message
------------------A message that is in (passing through) a node other than the one of
origin.
functional module
----------------A collection of electronic circuitry that resides on one board and works
together to accomplish a task.
halfword
---------------------------Any double byte on even 16-bit boundaries.
insert a node
----------------------The act of placing a node on a network for the purpose of transmitting
and receiving messages.
interrupt
---------------------------An event that changes the normal flow of instruction execution other
than an exception or a branch, jump, case or call instruction.
interrupt acknowledge cycle
---A DTB cycle, initiated by an interrupt handler, that reads a status/ID
from an interrupter. An interrupt handler generates this cycle when it
detects an interrupt request from an interrupter and it has control of the
DTB.