Crystal CS4281, Programming Manual

Page: 189 / 231

CS4281 Programming Manual
DS308PRM1 189
Confidential Draft 3/7/00
The
VOLUP
and
VOLDN
logic support software-
control/notification of hardware volume. When
Hardware Volume is enabled (
SSCR.HVC
= 1),
these pins can indicate the status of the hardware
volume pins, after debounce and enough time to al-
low for the other volume control to arrive (both be-
ing pressed) indicated a mute state. To enable
hardware volume interrupts, the GPIO bits must be
configured
•
VUPLT/VDNLT
= 1, GPIO input
pulse from HW volume logic
•
VUPPO/VDNPO
= 1, active high
(pulse)
•
VUPST/VDNST
= 1, sticky (capture
pulse)
•
HIMR.VUPIM/HIRM.VDNIM
= 0,
VOLUP/VOLDN
interrupts
enabled
Now host software will get an interrupt whenever
hardware master volume does an update. To clear
the interrupt
VxxS
must be written zero for the par-
ticular pin causing the interrupt.
If software wants total control over the master vol-
ume, then the update disable bits should all be set
(SSCR bits
MVLD
=
MVAD
=
MVMD
= 1) which keeps
the hardware volume control logic from updating
any master volume. Then when an interrupt occurs:
• Read HISR to see if
VUPI/VDNI
set
• If so, write GPIOR, bits
VUPS
and/or
VDNS
to 0 which clears the
interrupt
(read-modify-write: don’t mess
with other GPIO bits)
• update master volumes using host
software
GP3OE
0 = input
1 = output
GP3D
GP3PT
0 = CMOS
1 = open collector
non-inverting
buffer
GPIO3
GP3PT
0 = active low
1 = active high
Writing 0
to GP3S
clears
1
0
1
0
GP3ST
GP3OE
GP3ST
GP3OE
0 = input
1 = output
GP3S
GP3W
HIMR.GP3IM
Generate
a PME#
event
HIMR.GP3I
OR with other
interrupt sources
Q
Q
SET
CLR
D
Vdd
Figure 49. GPIO3 Conceptual Logic
D
ra
ft