Crystal CS4281, Programming Manual

Page: 222 / 231

Confidential Draft 3/7/00
CS4281 Programming Manual
222 DS308PRM1
22.5.13 Slot 12 Monitor Register 2 for Secondary Codec (SLT12M2)
Address: BA0: 4DCh, Read-Only
Default: 00000000h
Definition: Monitor port for the Secondary AC Link (
ASDIN2
), Slot 12 data. These bit positions match the
slot 12 recommendation in the AC ‘97 2.1 Audio Codec spec.
ASDIN2
slot 12, bits 19 through 0,
are stored in this register in the same bit position (slot 12 has 19 bits and this register uses 19 bits).
For slot 12 on
ASDIN2
to be stored in this register, the slot 12 tag bit from the codec must have
been set,
ACISV2.ISV12
.
Bit Descriptions:
AGPI[15:0] AC Link GPIO bits. Bits from slot 12 of the Secondary AC link (
ASDIN2
).
VSPI[2:0] Vendor Specific Input bits. From same position in Slot 12.
GP_INT GPIO Interrupt - Slot 12, bit 0. Indicates that at least one of the Secondary codec’s GPIO pins
has generated an interrupt. The rising edge of
GP_INT
is stored in
GPIOR.GPSS
and can
generate a host interrupt or a PME event. The interrupt is maskable through
HIMR.GPSIM
and
clearable by writing a zero
GPIOR.GPSS
which clears the CS4281 interrupt. The ability to
cause a
PME#
event is maskable through
SPMC.GISPEN
and must be cleared by writing a zero
to
GPIOR.GPSS
.
GP_INT
is cleared by writing to the Secondary Codec’s GPIO Sticky register
(Index 50h), and clearing the bit causing the interrupt. See Figure 52 in the General Purpose
Input/Output Pins section for conceptual logic.
22.5.14 AC ‘97 Status Register 2 (ACSTS2)
Address: BA0: 4E4h, Read-Only
Default: 00000000h
Definition: Status port for the second AC ‘97 link in a dual codec system (the
ASDIN2
pin). This register is
cleared by PCI
RST#
, the Serial Port enable bit
SSPM.ACLEN
, or when
ABITCLK
stops
(
CLKCR1.DLLRDY
low).
Bit Descriptions:
CRDY2 Codec Ready: This bit returns the last frame’s “codec ready” indicator in the second AC ‘97
input data stream.
0 = Codec not ready
1 = Codec ready
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
AGPI15 AGPI14 AGPI13 AGPI12
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
AGPI11 AGPI10 AGPI9 AGPI8 AGPI7 AGPI6 AGPI5 AGPI4 AGPI3 AGPI2 AGPI1 AGPI0 VSPI2 VSPI1 VSPI0 GP_INT
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
VSTS2 CRDY2
D
ra
ft