Crystal CS4281, Programming Manual

Page: 119 / 231

CS4281 Programming Manual
DS308PRM1 119
Confidential Draft 3/7/00
13.3.3 I/O Trap - FM Synthesis (IOTFM)
Address: BA0: 508h, Read-Write
Default: 00030000h
Definition: The mapping of these registers to the FM synthesis block is listed in Table 32.
Bit Descriptions:
SA[15:2] FmBase Start Address: Starting PCI I/O space address of the trap range. Bits above the I/O
Decode Control bits must be set to 0. For example, if
IODC[1:0]
= 10,
SA15-SA10
must be 0.
Bits 19-16 Address Mask: Logically, these bits are used to selectively mask off the lower two bits of
address accompanying an I/O transaction. After the mask operation is performed, the resulting
address is compared against
SA[15:2]
; if they are equal, the original I/O transaction lies within
the trap range. Forced to 3 for FM.
DLY[3:0] Delay PCI Cycle for this number of PCICLKs. TRDY# is delayed this number of clocks on
both read and write transactions. The
DLY
number does not include the normal clocks required
by the bus interface logic. For example, if the but interface logic normally takes 5 PCICLKs to
complete the transaction and
DLY[3:0]
= 3, then the entire PCI cycle will take 8 cycles. Up to
15 clocks can be added.
IODC[1:0] I/O Decode Control: These two bits control how many I/O address bits are decoded for the
trap range.
0 0 = Decode
SA15
down to
SA2
bits of I/O address (no aliasing, reset default)
0 1 = Decode
SA11
down to
SA2
bits of I/O address (
SA15-SA12
alias)
1 0 = Decode
SA9
down to
SA2
bits of I/O address (
SA15-SA10
alias)
1 1 = Reserved
WE Write Enable: This bit controls whether or not write trapping is enabled for the trap range.
0 = Write trapping disabled (reset default)
1 = Write trapping enabled
RE Read Enable: This bit controls whether or not read trapping is enabled for the trap range.
0 = Read trapping disabled (reset default)
1 = Read trapping enabled
As an example, the legacy emulation software may specifying the following I/O trap ranges using these
registers:
• Game port (0x200 - 0x207) using IOTGP:
Start address = 0x200, mask = 0x07, I/O decode control = 0x2, RE = WE = 1
• Sound Blaster digital audio (0x220 - 0x22F) using IOTSB:
Start address = 0x220, I/O decode control = 0x2, RE = WE = 1
• Adlib FM (0x388 - 0x38B) using IOTFM:
Start address = 0x388, I/O decode control = 0x2, RE = WE = 1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RE WE res res res IODC1 IODC0 DLY3 DLY2 DLY1 DLY0 0 0 1 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 0 0
D
ra
ft