Crystal CS4281, Programming Manual

Page: 169 / 231

CS4281 Programming Manual
DS308PRM1 169
Confidential Draft 3/7/00
18.1.4 Sound System Control Register (SSCR)
Address: BA0: 74Ch
Default: 00000000h
Definition: Core powered. This register is used to manage the Sound System operating configuration.
Bit Descriptions:
HVS1 Hardware Volume Step by 1. When set, each volume step (up or down) is 1 (1.5 dB). When
clear, each volume step is 2 (3.0 dB).
MVCS Master Volume Codec Select. Chooses the codec that hardware volume is directed to.
0 - Primary AC Link codec (Slot 1/2 tag bits valid)
1 - Secondary AC Link codec (Slot 1/2 tag bits invalid, slot 0 Codec select bits set to
SERMC.TCID[1:0]
)
MVLD Master Volume Line Out Disable. When set, disables Line Out Master Volume (02h) from
being updated by hardware volume pins.
MVAD Master Volume Alternate Out Disable. When set, disables the Headphone/Alternate Volume
(04h) from being updated by hardware volume pins.
MVMD Master Volume Mono Out Disable. When set, disables the Mono Out Volume (06h) from
being updated by hardware volume pins.
CDTX CD Transfer data. When set, and
SSPM.FMEN
clear, audio data received from ASDIN slots 3
and 4 (Slot IDs 10 and 11 resp.) on the AC Link are transferred by the SSC to the Wavetable
interface in the digital mixer. It is host software’s responsibility to make sure that no FIFOn is
programmed to use the wavetable interface (Slot IDs 29/30). This bit enabled CDROM data in
a notebook, to be digitized on the primary Codec ADC and played out a docking station
(secondary) Codec’s DACs without host software support.
HVC Hardware Volume Control Enable:
0 - no hardware volume control (disabled)
1 - hardware volume control pins active and modify AC-Link registers based on
MVCS
,
MVLD
,
MVAD
, and
MVMD
disable bits.
HVC
also enables HW volume interrupt capability.
LPSRC SRC loopback mode. When set, the internal data from a FIFO goes through the Playback SRC
and is looped back through the Capture SRC which then goes to a different FIFO. The AC
Link is taken out of the path.
XLPSRC External SRC loopback mode. When set, the external data coming from the AC Link goes
through the Capture SRC and is looped back to the Playback SRC, which then goes back out
the AC Link. The FIFOs are taken out of the path.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
HVS1 MVCS MVLD MVAD MVMD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
XLPSRC LPSRC CDTX HVC
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