Confidential Draft
3/7/00
CS4281 Programming Manual
224
DS308PRM1
22.5.17 AC ‘97 Status Data Register 2 (ACSDA2)
Address:
BA0: 4FCh, Read-Only
Default:
00000000h
Definition: Data register field for an AC ‘97 input frame on the second AC ‘97 link (the
ASDIN2
pin) in a
dual codec system.The contents of this register will not be overwritten by another input frame’s
valid data unless the valid status bit is cleared in ACSTS2 by a read of this register.
Side Effect: When this register is read, the valid status bit in ACSTS2 is cleared.
Bit Descriptions:
SD[15:0]
Status Data: This 16 bit field returns data of a read from the AC ‘97 control register.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SD15
SD14
SD13
SD12
SD11
SD10
SD9
SD8
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
D
ra
ft
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