CMT2380F64
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verification, SMBUS (System Management Bus) and PMBUS (Power Management Bus).
The main functions of I2C interface are described as follows:
◆
Multi-host function: the module can be used as a master device or a slave device;
◆
I2C master device function:
⚫
Generate clock;
⚫
Generate start and stop signals;
◆
I2C slave device function:
⚫
Progranmable address detection;
⚫
The I2C interface supports 7 bit or 10 bit addressing and supports dual slave address response in 7 bit
slave mode;
⚫
Stop bit detection;
◆
Generate and detect 7 bit /10 bit addresses and broadcast calls;
◆
Support diferent communication speeds:
⚫
Standard speed (up to 100 kHz);
⚫
Fast (up to 400 kHz)
；
⚫
Fast + (up to 1 MHz)
；
◆
Status flag:
⚫
Transmitter/ receiver mode falg;
⚫
Byte end flag;
⚫
I2C bus busy sign;
◆
Error flag:
⚫
Arbitration lost in master mode;
⚫
Response
（
ACK
）
error after address/data transmission;
⚫
Misaligned start or stop conditions detected;
⚫
Prohibit overflowing or underflowing when elongating the clock function;
◆
2 interrupt vectors:
⚫
1 interrupt for address/data communication successful;
⚫
1 interrupt for error;
◆
Optional elongated clock feature;
◆
DMA with a single byte cache;
◆
Generate or verify configurable PEC (packet error detection):
⚫
The PEC value can be sent as the last byte in transmission mode
⚫
A PEC error check for the last received byte
◆
SMBus 2.0 compatible
⚫
Low timeout delay for 25 ms clock
⚫
10 ms master device cumulative clock low expansion time
⚫
25 ms slave device cumulative clock low expansion time
⚫
Hardware PEC generation/verification with ACK control
⚫
Support for address resolution protocol (ARP)
◆
SMBus compatible
5.12 Universal synchronous asynchronous receiver transmitter
（
USART
）
In CMT2380F64, three serial transceiver interfaces are integrated, including two universal synchronous/asynchronous
transceivers (USART1, USART2) and one universal asynchronous transceiver (LPUART) supporting low power mode
operation. These three interfaces provide synchronous/asynchronous communication, support for IrDA SIR ENDEC transport
codec, multi-processor communication mode, single-wire semi-duplex communication mode, and LIN master/slave functionality.
The USART 1 and USART 2 interfaces have hardware CTS and RTS signal management, ISO7816 compatible smart card
mode and SPI-like communication mode, all interfaces can use DMA operation.
The main features of USART are as follows:
◆
Full-duplex, asynchronous communication;
◆
NRZ standard format;
◆
Fractional baud rate generator system, baud rate programmbale for sending and receiving up to 3M bits/s
◆
Programmbale data word length (8 or 9 bits)
◆
Configurable stop bits, supporting 1 or 2 stop bits
