CMT2380F64
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Rev 0.3 | 39 / 83
44
43
42
41
40
39
45
46
47
48
1
5
4
3
2
6
7
8
9
10
GND
34
30
31
32
33
29
28
27
26
25
17
18
19
20
21
22
16
15
14
13
NC
RFIP
RFIN
RFO
RF_AVDD
RF_DVDD
RF_DGND
GPIO3
G
P
IO
1
G
P
IO
2
X
O
X
I
P
B
8
P
B
7
/R
F
_
F
C
S
B
P
B
6
/R
F
_
C
S
B
P
B
4
/R
F
_
S
D
A
P
B
3
/R
F
_
S
C
L
K
N
C
PC13
M
C
U
_
N
R
S
T
P
F
0
M
C
U
_
V
D
D
A
B
O
O
T
0
P
A
0
P
A
1
P
A
2
P
A
3
P
A
4
PA6
M
C
U
_
V
S
S
A
PB12
PB13
PB14
PA9
PB15
PA8
PA10
PA11
CMT2380F64
QFN48_6x6_0.40
11
PC14
12
PC15
23
24
PA7
M
C
U
_
V
D
D
36
35
PA12
PA13
37
38
P
A
1
5
P
A
1
4
NC
P
F
1
Figure 2. CMT2380F64 QFN48 Pin Diagram
Table 2. CMT2380F64 (QFN40/QFN48) Pin description
Pin name
Pin number
I/O
Description
QFN 40 QFN 48
GND
0
0
Analog
Chip substrate, connected to GND
NC
1
1
-
No connection
RFIP/RFIN
2 - 3
2 - 3
Analog
RF signal input port
RFO
4
4
Analog
PA output
RF-AVDD
5
5
Analog
RF circuit VDD, required to connect to supply voltage of 1.8-3.6 V
RF-DGND
6
7
Digital
RF module digital GND
NC
-
6
-
No connection
RF-DVDD
7
8
Digital
RF module digital VDD, required to connected to supply voltage of
1.8-3.6 V
GPIO3
8
[2]
9
[2]
IO
RF module GPIO 3
,
it can be configured as
:
CLKO
,
DOUT/DIN
,
INT2
,
DCLK (TX/RX)
PC13
9
10
IO
MCU port PC 13
RTC_TAMP1
I
RTC invasive event detect input 1
RTC_TS
I
RTC event input