CMT2380F64
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Rev 0.3 | 13 / 83
1.8 Crystal Oscillator Specification
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Crystal frequency
[1]
F
XTAL
26
MHz
Frequency tolerance
[2]
ppm
20
ppm
Load capacitance
C
LOAD
15
pF
Equivalentresistance
Rm
60
Ω
Start-up time
[3]
XTAL
400
us
Notes:
[1]. CMT2380F64 can use the external reference clock to drive the XIN pin through the coupling capacitor. The peak value of the
external clock signal is between 0.3 V and 0.7 V.
[2]. The value includes (1) initial error; (2) crystal load; (3)aging; and (4) change with temperature. The acceptable crystal frequency
tolerance is limited by the receiver bandwidth and the RF frequency offset between the transmitter and the receiver.
[3]. The parameter is largely related to the crystal.
1.9
Controller Reset and Power Control Module Specification
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Rising
V
PVD
PLS[3:0]=0
1.8
1.88
1.96
V
Falling
PLS[3:0]=0
1.7
1.78
1.86
Rising
PLS[3:0]=1
2
2.08
2.16
Falling
PLS[3:0]=1
1.9
1.98
2.06
Rising
PLS[3:0]=2
2.2
2.28
2.36
Falling
PLS[3:0]=2
2.1
2.18
2.26
Rising
PLS[3:0]=3
2.4
2.48
2.56
Falling
PLS[3:0]=3
2.3
2.38
2.46
Rising
PLS[3:0]=4
2.6
2.68
2.76
Falling
PLS[3:0]=4
2.5
2.58
2.66
Rising
PLS[3:0]=5
2.8
2.88
2.96
Falling
PLS[3:0]=5
2.7
2.78
2.86
Rising
PLS[3:0]=6
3
3.08
3.16
Falling
PLS[3:0]=6
2.9
2.98
3.06
Rising
PLS[3:0]=7
3.2
3.28
3.36
Falling
PLS[3:0]=7
3.1
3.18
3.26
Rising
PLS[3:0]=8
3.4
3.48
3.56
Falling
PLS[3:0]=8
3.3
3.38
3.46
Rising
PLS[3:0]=9
3.6
3.68
3.76
Falling
PLS[3:0]=9
3.5
3.58
3.66
Rising
PLS[3:0]=10
3.8
3.88
3.96
Falling
PLS[3:0]=10
3.7
3.78
3.86
PVD delay
V
PVDhyst
(2)
-
80
100
125
mV
VDD power up/down
V
POR
-
-
1.53
-
V
1.10 Controller Embedded Reference Voltage
t