CMT2380F64
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Rev 0.3 | 16 / 83
Typical current consumption in operation mode,
with data processing code running from an internal Flash
Parameter
Symbol
Condition
f
HCLK
Typ
(1)
Unit
Enable all the
peripherals
Disable all the
peripherals
Supply current
in operating mode
I
DD
External high speed clock (HSE,) using
AHB prefrequency to reduce the
frequency
48 MHz
8.2
4.8
mA
24 MHz
5.0
3.3
8 MHz
2.7
2.1
Internal high speed RC oscillator (2)
(HSI)
，
AHB pre-frequency to reduce
the frequency
48 MHz
7.6
4.3
mA
24 MHz
4.3
2.7
8 MHz
2.1
1.5
1. Typical value is tested under TA=25
℃
, VDD=3.3V.
2. The internal high-speed clock is 8 MHz
，
and PLL is enabled when f
HCLK
>8 MHz.
Typical current consumption in sleep mode, data processing code is run from internal Flash or RAM
Parameter
Symbol
Condition
f
HCLK
Typ
(1)
Unit
Enable all the
peripherals
Disable all the
peripherals
Working current in
sleep mode
I
DD
External high speed clock
(HSE)
，
using AHB
prefrequency to reduce the
frequency
48 MHz
6.3
2.7
mA
24 MHz
3.7
2.0
8 MHz
1.8
1.2
Internal high speed RC
oscillator(2) (HSI)
，
AHB
pre-frequency to reduce the
frequency
48 MHz
5.7
2.1
mA
24 MHz
3.1
1.4
8 MHz
1.2
0.6
1. Typical value is tested under TA=25
℃
, VDD=3.3 V.
2. The internal high-speed clock is 8 MHz
，
and PLL is enabled when fHCLK>8 MHz.
1.12 External Clock Source Charateristic
⚫
High-speed external user clock generated from external oscillation sources
The characteristic parameters in the following table are measured under a high-speed external clock source and the ambient
temperature and supply voltage meet the conditions in the following table.
High-speed external user clock features
Symbol
Parameter
Condition
Min
Typ
Max
Unit
f
HSE_ext
User external clock frequency
-
4
8
20
MHz
V
HSEH
OSC_IN
input pin at high-level voltage
(1)
0.7 V
DD
-
V
DD
V
V
HSEL
OSC_IN
input pin at low-level voltage
(1)
V
SS
-
0.3 V
DD
t
w(HSE)
OSC_IN
high /low time
(1)
16
-
-
ns
t
r(LSE)
t
f(LSE)
OSC_IN
up/ down time
(1)
-
-
20
C
in(HSE)
OSC_IN
input capacitance
(1)
5
pF
