CMT2380F64
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Rev 0.3 | 27 / 83
SPI sequence diagram
– slave mode and CPHA=0
SPI sequence diagram - slave model and CPHA=1
(1)
1.
The measurement points are set at CMOS level: 0.3 VDD and 0.7 VDD.
t
c(SCLK)
MSB out
Bit 6~1 out
MSB in
Bit 6~1 in
LSB out
LSB in
NSS input
CLKPOL=0
MISO output
MOSI input
CLKPOL=1
t
a(SO)
t
dis(SO)
t
h(NSS)
t
su(NSS)
t
w(SCLKH)
t
w(SCLKL)
t
r(SCLK)
t
f(SCLK)
t
h(SI)
t
su(SI)
t
v(SO)
t
h(SO)
CLKPHA=0
t
c(SCLK)
MSB out
Bit 6~1 out
MSB in
Bit 6~1 in
LSB out
LSB in
NSS input
CLKPOL=0
MISO output
MOSI input
CLKPOL=1
t
a(SO)
t
dis(SO)
t
h(NSS)
t
su(NSS)
t
w(SCLKH)
t
w(SCLKL)
t
r(SCLK)
t
f(SCLK)
t
h(SI)
t
su(SI)
t
v(SO)
t
h(SO)
CLKPHA=1
