UG-1262
Rev. B | Page 11 of 312
Table 1. Number Notations
Notation Description
Bit N
Bits are numbered in little endian format, where the least significant bit of a number is referred to as Bit 0.
V[x:y]
A range from Bit x to Bit y of a value or a field (V) is represented in bit field format, V[x:y].
0xNN
Hexadecimal (Base 16) numbers are preceded by the 0x prefix.
0bNN
Binary (Base 2) numbers are preceded by the 0b prefix.
Table 2. Register Access Conventions
Mode Description
R/W
Memory location has read and write access.
RC
Memory location is cleared after reading the location.
R
Memory location is read access only. A read always returns 0, unless otherwise specified.
W
Memory location is write access only.
R/W1C
Memory location has read access. To clear to 0, write 1 once to the memory location.
Memory mapped register (MMR) bits that are not documented are reserved. When writing to MMRs with reserved bits, the reserved bits
must be written with the value in the reset column of the relevant MMR description, unless otherwise specified.
Note that, throughout this user guide, multifunction pins, such as P0.0/SPI0_CLK, are referred to either by the entire pin name or by a
single function of the pin, for example, P0.0, when only that function is relevant.
In header files, registers are grouped in stacks, such as CLKG0_CLK and AFECON. These stack names serve as pointers to each element
in the associated structure and are used to access specific registers. For example, to access the STAT0 register, the user must enter the
following:
pADI_CLKG0_CLK->STAT0
Not all registers have stacks, in which case the register name is not preceded by a stack name in this hardware reference manual.