MC96F6432
June 22, 2018 Ver. 2.9
3
VERSION 1.7 (November 19, 2013)
Retype a typo on
‘P5FSR register’s contents’.
VERSION 1.8 (February 26, 2014)
Change a package diagram,
“44-Pin MQFP-1010”.
VERSION 1.9 (March 21, 2014)
AVREF range changed from 1.8V~VDD to 2.7V~VDD
Figure 10.3 and Figure 10.6 modified
Appendix 1
“DJNZ Rn,rel” instruction 3bytes
2bytes
Add contents,
“Writing “1” has no effect” in all interrupt flag bits.
VERSION 2.0 (April 11, 2014)
AVREF range changed from 2.7V~VDD to 1.8V~VDD
Figure 11.41 modified
VERSION 2.1 (July 9, 2014)
Change “Read Protection” to “Code Read Protection” in Configure Option.
Change
“Hard-Lock” to “Code Write Protection” in Configure Option.
Change “RESETB select” to “Select RESETB pin” in Configure Option.
Change “Protection Area” to “Specific Area Write Protection” in Configure Option.
Add note of “Specific Area Write Protection” in Configure Option, “When PAEN = ‘1’, it is applied.”
Fix the typo.
VERSION 2.2 (October 13, 2014)
Add a package type,
“MC96F6432L(48 LQFP-0707)”.
VERSION 2.3 (November 4, 2014)
Add contents of Flash,
“Protection for Invalid Erase/Write”.
VERSION 2.4 (April 10, 2015)
Add a note at P0, P1, P2, P3, P4, P5, EIFLAG0 register description and SFR map.
Change a Figure 10.3 Interrupt sequence flow
Change a Figure 11.53 A/D Analog Input pin with Capacitor in12-Bit A/D Converter.
VERSION 2.5 (May 11, 2015)
Add a chapter
“C. ESD Test Method” in APPENDIX
VERSION 2.6 (December 22, 2015)
Change symbol name from ILE, DLE, FSE, t
CON
, V
AN
, I
AN
to INL, DNL, TOE, t
CONV
, V
AIN
, I
AIN
in 7.3 A/D Converter
Characteristics
Change t
R
spec max value form 30.0V/ms to 5.0V/ms in 7.4 Power-On Reset Characteristics
Add a note about OSCCR in Chapter 11.1 Clock Generator.
Fixed typos.
VERSION 2.7 (April 4, 2016)
Change t
R
spec max value form 5.0V/ms to 30.0V/ms in 7.4 Power-On Reset Characteristics
Add Flash Data Retention Time in 7.15 Internal Flash Rom Characteristics
Add a chapter 7.23 Recommended Circuit and Layout with SMPS Power.
Modify the program tips in 15. Flash Memory.
Add an appendix about “Flash Protection for invalid Erase/Write”
VERSION 2.8 (January 31, 2017)
Added the note on the flash memory erase and write in Chapter 15. Flash Memory.
Updated OCD dongle image and writing tool images in Chapter 1.4 Development tools.
Fixed typos of USI0 Status Register in Chapter 11.12 USI0 (UART + SPI + I2C).
Fixed typos of USI1 Status Register in Chapter 11.13 USI1 (UART + SPI + I2C).
Summary of Contents for MC96F6332D
Page 24: ...MC96F6432 24 June 22 2018 Ver 2 9 4 Package Diagram Figure 4 1 48 Pin LQFP 0707 Package...
Page 25: ...MC96F6432 June 22 2018 Ver 2 9 25 Figure 4 2 44 Pin MQFP Package...
Page 26: ...MC96F6432 26 June 22 2018 Ver 2 9 Figure 4 3 32 Pin LQFP Package...
Page 27: ...MC96F6432 June 22 2018 Ver 2 9 27 Figure 4 4 32 Pin SOP Package...
Page 28: ...MC96F6432 28 June 22 2018 Ver 2 9 Figure 4 5 28 Pin SOP Package...