Abov MC96F6332D, User Manual

Page: 173 / 327

MC96F6432
June 22, 2018 Ver. 2.9 173
11.8.8.3 Timer/Counter 4 Register Description
The timer/counter 4 register consists of timer 4 PWM period high/low register (T4PPRH/L), timer 4 PWM A duty
high/low register (T4ADRH/L), timer 4 PWM B duty high/low register (T4BDRH/L), timer 4 PWM C duty high/low
register (T4CDRH/L), timer 4 PWM A delay register (T4DLYA), timer 4 PWM B delay register (T4DLYB), timer 4
PWM C delay register (T4DLYC), timer 4 data register (T4DR), timer 4 capture data register (T4CAPR), timer 4
counter register (T4CNT), timer 4 control register (T4CR), timer 4 PWM control register 1 (T4PCR1), timer 4
PWM control register 2 (T4PCR2), timer 4 PWM control register 3 (T4PCR3), timer 4 interrupt status register
(T4ISR) and timer 4 interrupt mask register (T4MSK).
11.8.8.4 Register Description for Timer/Counter 4
T4PPRH (Timer 4 PWM Period High Register : 6-ch PWM mode only) : 1009H (ESFR)
7 6 5 4 3 2 1 0
– – – – – –
T4PPRH1 T4PPRH0
– – – – – –
R/W R/W
Initial value : 00H
T4PPRH[1:0] T4 PWM Period Data High Byte
T4PPRL (Timer 4 PWM Period Low Register : 6-ch PWM mode only) : 1008H (ESFR)
7 6 5 4 3 2 1 0
T4PPRL7 T4PPRL6 T4PPRL5 T4PPRL4 T4PPRL3 T4PPRL2 T4PPRL1 T4PPRL0
R/W R/W R/W R/W R/W R/W R/W R/W
Initial value : FFH
T4PPRL[7:0] T4 PWM Period Data Low Byte
T4ADRH (Timer 4 PWM A Duty High Register : 6-ch PWM mode only) : 100BH (ESFR)
7 6 5 4 3 2 1 0
– – – – – –
T4ADRH1 T4ADRH0
– – – – – –
R/W R/W
Initial value : 00H
T4ADRH[1:0]
T4 PWM A Duty Data High Byte
T4ADRL (Timer 4 PWM A Duty Low Register : 6-ch PWM mode only) : 100AH (ESFR)
7 6 5 4 3 2 1 0
T4ADRL7 T4ADRL6 T4ADRL5 T4ADRL4 T4ADRL3 T4ADRL2 T4ADRL1 T4ADRL0
R/W R/W R/W R/W R/W R/W R/W R/W
Initial value : 7FH
T4ADRL[7:0] T4 PWM A Duty Data Low Byte