MC96F6432
174
June 22, 2018 Ver. 2.9
T4BDRH (Timer 4 PWM B Duty High Register : 6-ch PWM mode only) : 100DH (ESFR)
7
6
5
4
3
2
1
0
–
–
–
–
–
–
T4BDRH1
T4BDRH0
–
–
–
–
–
–
R/W
R/W
Initial value : 00H
T4BDRH[1:0]
T4 PWM B Duty Data High Byte
T4BDRL (Timer 4 PWM B Duty Low Register : 6-ch PWM mode only) : 100CH (ESFR)
7
6
5
4
3
2
1
0
T4BDRL7
T4BDRL6
T4BDRL5
T4BDRL4
T4BDRL3
T4BDRL2
T4BDRL1
T4BDRL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 7FH
T4BDRL[7:0]
T4 PWM B Duty Data Low Byte
T4CDRH (Timer 4 PWM C Duty High Register : 6-ch PWM mode only) : 100FH (ESFR)
7
6
5
4
3
2
1
0
–
–
–
–
–
–
T4CDRH1
T4CDRH0
–
–
–
–
–
–
R/W
R/W
Initial value : 00H
T4CDRH[1:0]
T4 PWM C Duty Data High Byte
T4CDRL (Timer 4 PWM C Duty Low Register : 6-ch PWM mode only) : 100EH (ESFR)
7
6
5
4
3
2
1
0
T4CDRL7
T4CDRL6
T4CDRL5
T4CDRL4
T4CDRL3
T4CDRL2
T4CDRL1
T4CDRL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 7FH
T4CDRL[7:0]
T4 PWM C Duty Data Low Byte
T4DLYA (Timer 4 PWM A Delay Register : 6-ch PWM mode only) : 1010H (ESFR)
7
6
5
4
3
2
1
0
T4DLYAA3
T4DLYAA2
T4DLYAA1
T4DLYAA0
T4DLYAB3
T4DLYAB2
T4DLYAB1
T4DLYAB0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
T4DLYAA[3:0]
PWM4AA Delay Data (Rising edge only)
T4DLYAB[3:0]
PWM4AB Delay Data (Rising edge only)
T4DLYB (Timer 4 PWM B Delay Register : 6-ch PWM mode only) : 1011H (ESFR)
7
6
5
4
3
2
1
0
T4DLYBA3
T4DLYBA2
T4DLYBA1
T4DLYBA0
T4DLYBB3
T4DLYBB2
T4DLYBB1
T4DLYBB0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
T4DLYBA[3:0]
PWM4BA Delay Data (Rising edge only)
T4DLYBB[3:0]
PWM4BB Delay Data (Rising edge only)
Summary of Contents for MC96F6332D
Page 24: ...MC96F6432 24 June 22 2018 Ver 2 9 4 Package Diagram Figure 4 1 48 Pin LQFP 0707 Package...
Page 25: ...MC96F6432 June 22 2018 Ver 2 9 25 Figure 4 2 44 Pin MQFP Package...
Page 26: ...MC96F6432 26 June 22 2018 Ver 2 9 Figure 4 3 32 Pin LQFP Package...
Page 27: ...MC96F6432 June 22 2018 Ver 2 9 27 Figure 4 4 32 Pin SOP Package...
Page 28: ...MC96F6432 28 June 22 2018 Ver 2 9 Figure 4 5 28 Pin SOP Package...