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15.7
Current reversal and weak-end infeed logic for residual
overcurrent protection ECRWPSCH
IP14365-1 v4
15.7.1
Identification
M14883-1 v2
Function description
IEC 61850
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Current reversal and weak-end
infeed logic for residual overcurrent
protection
ECRWPSCH
-
85
15.7.2
Application
IP15041-1 v1
15.7.2.1
Fault current reversal logic
M15285-3 v6
Figure
show a typical system condition, which can result in a fault current
reversal.
Assume that fault is near the B1 breaker. B1 Relay sees the fault in Zone1 and A1 relay identifies
the fault in Zone2.
Note that the fault current is reversed in line L2 after the breaker B1 opening.
It can cause an unselective trip on line L2 if the current reversal logic does not block the
permissive overreaching scheme in the IED at B2.
L1
L2
A1
A2
B1
B2
IEC9900043-2.vsd
IEC99000043 V3 EN-US
Figure 383: Current distribution for a fault close to B side when all breakers are closed
L1
L2
A1
A2
B1
B2
IEC99000044-2.vsd
IEC99000044 V3 EN-US
Figure 384: Current distribution for a fault close to B side when breaker at B1 is opened
When the breaker on the parallel line operates, the fault current on the healthy line is reversed.
The IED at B2 recognizes the fault in forward direction from reverse direction before breaker
operates. As IED at B2 already received permissive signal from A2 and IED at B2 is now
detecting the fault as forward fault, it will immediately trip breaker at B2. To ensure that
tripping at B2 should not occur, the permissive overreaching function at B2 needs to be
blocked by IRVL till the received permissive signal from A2 is reset.
Section 15
1MRK 505 343-UEN B
Scheme communication
618
Application manual
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