Job
Valid range
Writing
pulse duration
*
0 ... 510ms
*) Only even values allowed. Odd values are automatically rounded.
As soon as during a count process an edge 0-1 is recognized at the "Latch" input of a
counter, the recent counter value is stored in the according latch register.
You may access the latch register via
LATCHVAL
of the SFB 47.
A just in
LATCHVAL
loaded value remains after a STOP-RUN transition.
5.6.5 Parametrization
5.6.5.1
Address assignment
Sub module
Input address
Access
Assignment
Counter
816
DINT
Channel 0: Counter value / Frequency value
820
DINT
Channel 1: Counter value / Frequency value
824
DINT
Channel 2: Counter value / Frequency value
828
DINT
Channel 3: Counter value / Frequency value
Sub module
Output address
Access
Assignment
Counter
816
DWORD
reserved
820
DWORD
reserved
824
DWORD
reserved
828
DWORD
reserved
5.6.5.2
Interrupt selection
Via
‘Basic parameters’
you can reach
‘Select interrupt’
. Here you can define the inter-
rupts the CPU will trigger. The following parameters are supported:
n
None: The interrupt function is disabled.
n
Process: The following events of the counter can trigger a hardware interrupt (select-
able via
‘Count’
):
–
Hardware gate opening
–
Hardware gate closing
–
On reaching the comparator
–
on Counting pulse
–
on overflow
–
on underflow
n
Diagprocess: A diagnostics interrupt is only triggered when a hardware inter-
rupt was lost.
Latch function
VIPA System SLIO
Deployment I/O periphery
Counting > Parametrization
HB300 | CPU | 013-CCF0R00 | en | 16-40
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