Xilinx Virtex-4 QV FPGA, Руководство пользователя

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Virtex-4 QV FPGA Ceramic Packaging www.xilinx.com 13
UG496 (v1.1) June 8, 2012
Pin Definitions
R
RXPPADA_#,
RXPPADB_#
Input Positive differential receive port of the RocketIO MGT.
RXNPADA_#,
RXNPADB_#
Input Negative differential receive port of the RocketIO MGT.
TXPPADA_#,
TXPPADB_#
Output Positive differential transmit port of the RocketIO MGT.
TXNPADA_#,
TXNPADB_#
Output Negative differential transmit port of the RocketIO MGT.
VTRXA_#,
VTRXB_#
Input Receive termination supply for the RocketIO MGT (0V - 2.5V).
VTTXA_#,
VTTXB_#
Input Transmit termination supply for the RocketIO MGT (1.2V - 1.5V).
Notes:
1. All dedicated pins (JTAG and configuration) are powered by V
CC_CONFIG
.
2. For more information on lower capacitance pins, see the UG070, Virtex-4 User Guide .
3. For more information on RocketIO pins, see the UG076 , Virtex-4 RocketIO Multi-Gigabit Transceiver User Guide .
Table 1-3: Virtex-4 QPro FPGA Pin Definitions (Cont’d)
Pin Name Direction Description