114
Virtex-4 QV FPGA Ceramic Packaging
UG496 (v1.1) June 8, 2012
Chapter 2: Pinout Tables
R
N/A
GND
AE20
N/A
GND
AR20
N/A
GND
H21
N/A
GND
P21
N/A
GND
T21
N/A
GND
V21
N/A
GND
AB21
N/A
GND
AD21
N/A
GND
AH21
N/A
GND
C22
N/A
GND
L22
N/A
GND
R22
N/A
GND
U22
N/A
GND
AA22
N/A
GND
AC22
N/A
GND
AL22
N/A
GND
AU22
N/A
GND
D23
N/A
GND
P23
N/A
GND
T23
N/A
GND
AD23
N/A
GND
AP23
N/A
GND
G24
N/A
GND
R24
N/A
GND
U24
N/A
GND
AE24
N/A
GND
AG24
N/A
GND
AU24
N/A
GND
K25
N/A
GND
P25
N/A
GND
T25
N/A
GND
Y25
N/A
GND
AD25
N/A
GND
AF25
N/A
GND
AH25
N/A
GND
AK25
N/A
GND
C26
N/A
GND
N26
Table 2-3:
FF1517 Package Pinout (FX140) (Cont’d)
Bank
Pin Description
Pin Number
No Connects