Toshiba ESTUDIO170F, Руководство по обслуживанию

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e-STUDIO170F Circuit Description January 2005 © TOSHIBA TEC
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[ 1 ] Initial Operation
When the main power is turned on, +5VPS is delivered from the LVPS allowing the Sub-CPU to be
placed in the operating state. After power on resetting, the Sub-CPU performs initialization causing the
PSC signal to go HIGH. This allows the power supply voltages of 24V, ±12V, and +5V to be delivered to
the entire system from the LVPS.
When the ASIC (I/O port: IC38) is placed in the operating state and the PWRSVACK signal and PWRS-
VNACK go HIGH, the Sub-CPU causes the PWRSVDI signal to be LOW to enable the port (IC45, 58).
[ 2 ] Auto Power Save Mode
To use the Auto Power Save Mode, set the Super Power Save Mode setting to Auto.
When the machine is placed in the standby state, the ASIC (I/O port) causes the LEDBLK signal to go
LOW and outputs it to the Sub-CPU. Upon receipt the LEDBLK signal, the Sub-CPU makes the PWRS-
VLED signal to go LOW to light the power save LED installed on the Operation panel PBA and activate
the super power save reserved state.
When a fixed time has elapsed in the super power save reserved state, the ASIC (I/O port) causes the
PWRSVACK signal to go HIGH and outputs it to the Sub-CPU. The Sub-CPU causes the PSC signal to
go LOW through IC46 turn on Q200, thereby cutting off the supply of power to other than the super
power save circuit. This allows the machine to be placed in the super power save mode to light the
power save LED.
[ 3 ] Manual Power Save Mode
To use the Manual Power Save Mode, set the Super Power Save Mode setting to Manual.
When the power save key installed on the Operation panel PBA is pressed, the Sub-CPU causes the
PWRSVREQ signal to go LOW and outputs it to the ASIC (I/O port).
At this time, ASIC (I/O port) assumes the super power save reserved state until the process in execu-
tion ends. It causes the LEDBLK signal to go LOW and outputs it to the Sub-CPU. Upon receipt of the
LEDBLK signal is input, the Sub-CPU makes the PWRSVLED signal to go LOW to light the power save
LED on the Operation panel PBA. When the power save key is pressed again while the power save
LED is lighting, the super power save reserved state will be deactivated to turn off the power save LED.
When the process in execution ends, the super power save reserved state changes to the super power
save state or the super power save is cancelled depending on the following conditions.
• An error has occurred or image data are held in the SDRAM (IC1) (the super power save state can-
not be assumed).
The ASIC (I/O port) causes the PWRSVNACK signal to be HIGH and outputs it to the Sub-CPU.
The Sub-CPU causes the PWRSVREQ signal to be HIGH to cancel the power save reserved state.
(The power save LED goes out.)
• Normal state or paper empty error (the super power save state can be assumed).
The ASIC (I/O port) causes the PWRSVACK signal to be HIGH and outputs it to the Sub-CPU. The
Sub-CPU causes the PWRSVREQ signal to be HIGH to cancel the super power save reserved
state. Then it causes the PSC signal to be LOW to cut off the supply of power from the LVPS to
other than the super power save circuit. This allows the super power save state to be assumed to
light the power save LED.