RKC INSTRUMENT Z-TIO-G, Инструкция по эксплуатации

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7. MODBUS
IMS01T28-E4
7-5
7.1.5 Calculating CRC-16
The Cyclic Redundancy Check (CRC) is a 2 byte (16-bit) error check code. After constructing the data
message, not including start, stop, or parity bit, the master calculates a CRC code and appends this to the
end of the message. The slave will calculate a CRC code from the received message, and compare it with
the CRC code from the master. If they do not match, a communication error has occurred and the slave
does not respond.
The CRC code is formed in the following sequence:
1. Load FFFFH to a 16-bit CRC register.
2. Exclusive OR (

) the first byte (8 bits) of the message with the CRC register. Return the result to the
CRC register.
3. Shift the CRC register 1 bit to the right.
4. If the carry flag is 1, exclusive OR the CRC register with A001 hex and return the result to the CRC
register. If the carry flag is 0, repeat step 3 .
5. Repeat step 3 and 4 until there have been 8 shifts.
6. Exclusive OR the next byte (8 bits) of the message with the CRC register.
7. Repeat step 3 through 6 for all bytes of the message (except the CRC).
8. The CRC register contains the 2 byte CRC error code. When they are appended to the message, the
low-order byte is appended first, followed by the high-order byte.