SNC 4000 User’s Guide
143
POST Error Codes
The Power-On-Self-Test (POST) is responsible for testing the integrity of the processor’s SDRAM. After
testing SDRAM POST will attempt to transfer control to either the default bootrom image or an alternate
image.
POST can also download binary images over the service port and write them to flash memory. This enables
POST to perform a minimal amount of emergency recovery from FLASH errors.
POST Boot Behavior
The following sections describe POST boot behavior.
ROM Init
Power-on
Figure 10
ROM Init
After applying power the ERR LED will illuminate. At this time postInit code initializes the processor's internal
registers and subsystems, including the SDRAM controller. The processor's internal RAM is used as a tiny-
stack for this stage of POST. Control is then passed to the
Ipostmain
routine for the SDRAM memory
tests.
Note
The power LED is under hardware control on the SNC. It should always be
illuminated.
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