Quantum SNC 4000, Руководство пользователя

Страница: 151 / 164

SNC 4000 User’s Guide 145
Memory Size
Figure 14 Memory Size
This test verifies that the apparent size of SDRAM meets the minimum and maximum sizes specified for the
product. This test is identified by the flash of the
FC and S1 LED s.
Pattern Test
Figure 15 Pattern Test
This test writes and reads a series of diagnostic patterns to each memory location in SDRAM. This test is
identified by the repeated flash of the
S2 LED. This test can take several seconds to complete.
Address Test
Figure 16 Address Test
This test writes and reads address tags to memory to test for bad SDRAM address lines. This test is
identified by the flash of the
FC and S2 LED. POST then relocates itself to SDRAM and moves its stack from
processor internal RAM to SDRAM. Control is then transferred to the SDRAM-based secondary POST.
IpostMain
starts by initializing the service-port and the system PLD(s). The ERR LED will extinguish and
the RDY LED will turn on. POST will display the following message on the service port:
Secondary POST
This stage of POST attempts to locate and execute the intermediate loader, or “bootrom”. If the operator
presses the interrupt button then POST will enter into the service menu. See the section “POST Service
Menu” for details.