NPM PCL6113, Руководство пользователя

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Terminal No.
Signal name
PCL
6113
PCL
6123
PCL
6143
Input/
output
Logic
Treat
-ment
Description
IF0
IF1 1
2 1
2 1
2 Input
Enter the CPU-I/F mode
4 4 4 Input Negative When the signal level on this terminal is LOW,
the and terminals will be valid.
5
6 5
6 5
6 Input Negative Connect the I/F signals to the CPU. The
and terminals are valid when terminal
is LOW.
A0
A1
A2
A3
A4 7
8
9 7
8
9
10 7
8
9
10
11 Input Positive Address control signals
For details about terminal A0, see the section
describing the IF1 and IF0 terminals.
11 12 13 Output Negative OP Outputs an interrupt request signal to a CPU.
There is three types of interrupt signals: a
stop interrupt, error interrupt, and an event
interrupt. The interrupt type can be
determined by reading the main status.
Each interrupt will be reset by reading the
main status, REST (error interrupt cause)
register, or RIST (event interrupt cause)
register.
The
signal can be masked.
12 13 14 Output Negative OP Outputs a wait request signal to cause a CPU
to wait.
The LSI needs 4 reference clock cycles to
process each command.
If you will not be using the signal, check
the IFB terminal signal level so that you won't
try to access the LSI while it is processing a
command.
will only be LOW when and are
LOW.
13 14 15 Output Negative OP Signal used to indicate that the LSI is
processing commands.
Use this signal to make connections with a
CPU that does not have a wait control input
terminal.
When
the LSI receives a write command from
a CPU, this signal will go LOW. When the LSI
finishes processing, this signal will go HIGH.
The LSI makes sure that this terminal is HIGH
and then proceeds to the next step.