Intel 8XC196NT, Руководство пользователя

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8XC196NT USER’S MANUAL
Chapter 8 — Synchronous Serial I/O (SSIO) Port — describes the synchronous serial I/O
(SSIO) port and explains how to program it.
Chapter 9 — Slave Port — describes the slave port and explains how to program it. Chapter 6,
“I/O Ports,” explains how to configure port 3 to serve as the slave port. This chapter discusses
additional configurations specific to the slave port function and describes how to use the slave
port for interprocessor communication.
Chapter 10 — Event Processor Array (EPA) — describes the event processor array, a tim-
er/counter-based, high-speed input/output unit. It describes the timer/counters and explains how
to program the EPA and how to use the EPA to produce pulse-width modulated (PWM) outputs.
Chapter 11 — Analog-to-digital Converter — provides an overview of the analog-to-digital
(A/D) converter and describes how to program the converter, read the conversion results, and in-
terface with external circuitry.
Chapter 12 — Minimum Hardware Considerations — describes options for providing the ba-
sic requirements for device operation within a system, discusses other hardware considerations,
and describes device reset options.
Chapter 13 — Special Operating Modes — provides an overview of the idle, powerdown, and
on-circuit emulation (ONCE) modes and describes how to enter and exit each mode.
Chapter 14 — Interfacing with External Memory — lists the external memory signals and de-
scribes the registers that control the external memory interface. It discusses the bus width and
memory configurations, the bus-hold protocol, write-control modes, and internal wait states and
ready control. Finally, it provides timing information for the system bus.
Chapter 15 — Programming the Nonvolatile Memory — provides recommended circuits, the
corresponding memory maps, and flow diagrams. It also provides procedures for auto program-
ming, and describes the commands used for serial port programming.
Appendix A — Instruction Set Reference — provides reference information for the instruction
set. It describes each instruction; defines the processor status word (PSW) flags; shows the rela-
tionships between instructions and PSW flags; and lists hexadecimal opcodes, instruction
lengths, and execution times. (For additional information about the instruction set, see Chapter 3,
“Programming Considerations.”)
Appendix B — Signal Descriptions — provides reference information for the device pins, in-
cluding descriptions of the pin functions, reset status of the I/O and control pins, and package pin
assignments.