IBM 3745 Series, Справочник по техническому обслуживанию оборудования

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Write Policy
Write requests are always presented both to the cache and main storage (store-
through policy). The write request is sent to storage but as soon as it is accepted
by the SCTL, the CCU proceeds to the next instruction without waiting for storage
update completion. This policy ensures that cache and storage are always con-
sistent with each other and minimizes housekeeping when a cache line must be
replaced.
Since on a write request, main storage is always updated (regardless of cache hit
or miss), and since the CCU does not wait for write completion, there would be no
gain in loading a line in the cache in case of a cache miss. This new line would
most probably replace a more useful line in the cache. Therefore, the cache is not
loaded with a new line on a write miss.
Read Policy
A CCU read request can come from different sources. The source (called the
storage user) can be: The MOSS, the branch trace, the prefetch mechanism, the
program, or the IOC (cycle steal mode).
In order to increase the cache hit ratio, the cache is loaded with a new line only
when a read miss is caused by an I-fetch or a program read. Any other storage
user causing a read miss, results in the data being loaded directly from memory to
the CCU without cache involvement.
Line Invalidation
Because of DMA operation, the SCTL requests the cache to invalidate a line. An
invalidation request has priority over a CCU request.
When a line invalidation is requested, the SCTL raises the line 'invalid line', which
instructs the cache not to propagate the storage address register (SAR) to the
storage address data (SAD) bus and to latch the address presented by the SCTL.
In the cycle following the address transfer, the cache invalidates the line in the
cache and the SCTL ignores requests at the interconnection.
Storage Protection
Storage Protect and Address Exception (SP/AE)
Storage protect is a means of notifying the control program whenever the contents
of storage are accessed for unauthorized modification or unauthorized code exe-
cution. Attempts to modify storage and attempts to execute instructions are moni-
tored by the following three mechanisms:
1. Address exception based on address exception key.
2. Storage protect based on read-only key.
3. Storage protect based on storage protection key and user key.
Main Storage Protection State
With the storage protect and address exception mechanism, a main storage posi-
tion can be placed in any of the following states:
Ÿ
Write free
Ÿ Write and instruction fetch controlled
Ÿ Read-only
Ÿ Write or/and read forbidden.
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IBM 3745 Models 130, 150, 160, 170, and 17A: Hardware Maintenance Reference